88 lines
2.4 KiB
C
88 lines
2.4 KiB
C
/*
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* Copyright (C) 2018 Rockchip Electronics Co., Ltd
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* Author: Zhihuan He <huan.he@rock-chips.com>
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_SDRAM_RV1108_H
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#define _ASM_ARCH_SDRAM_RV1108_H
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#include <common.h>
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#include <ram.h>
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#include <asm/arch/cru_rv1108.h>
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#include <asm/arch/grf_rv1108.h>
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#include <asm/arch/pmu_rv1108.h>
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#include <asm/arch/sdram_rv1108_pctl_phy.h>
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#define SR_IDLE 3
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#define PD_IDLE 64
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#define SDRAM_BEGIN_ADDR 0x60000000
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#define SDRAM_END_ADDR 0x80000000
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#define PATTERN (0x5aa5f00f)
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struct rv1108_service_msch {
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u32 id_coreid;
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u32 id_revisionid;
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u32 ddrconf;
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u32 ddrtiming;
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u32 ddrmode;
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u32 readlatency;
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u32 reserveds1[8];
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u32 activate;
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u32 devtodev;
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};
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enum {
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/*memory scheduler ddrtiming*/
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BWRATIO_HALF_BW = 0x80000000,
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BWRATIO_HALF_BW_DIS = 0x0,
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};
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struct dram_info {
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struct rv1108_cru *cru;
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struct rv1108_grf *grf;
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struct rv1108_pmu *pmu;
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struct rv1108_pmu_grf *pmu_grf;
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struct ddr_phy *phy;
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struct ddr_pctl *pctl;
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struct rv1108_service_msch *service_msch;
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struct ram_info info;
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};
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struct sdram_params {
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u32 ddr_2t_en;
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struct ddr_config ddr_config_t;
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struct pll_div dpll_init_cfg;
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struct ddr_timing ddr_timing_t;
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};
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int check_rd_gate(struct dram_info *priv);
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void enable_low_power(struct dram_info *priv,
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struct sdram_params *params_priv);
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void ddr_msch_cfg(struct dram_info *priv,
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struct sdram_params *params_priv);
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void ddr_msch_cfg_rbc(struct sdram_params *params_priv,
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struct dram_info *priv);
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void ddr_msch_get_max_col(struct dram_info *priv,
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struct ddr_schedule *sch_priv);
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void ddr_msch_get_max_row(struct dram_info *priv,
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struct ddr_schedule *sch_priv);
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void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq);
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void ddr_phy_skew_cfg(struct dram_info *priv);
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void enable_ddr_io_ret(struct dram_info *priv);
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void modify_data_training(struct dram_info *priv,
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struct sdram_params *params_priv);
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void move_to_config_state(struct dram_info *priv);
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void pctl_cfg_grf(struct dram_info *priv,
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struct sdram_params *params_priv);
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void phy_pctrl_reset_cru(struct dram_info *priv);
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void rkdclk_init(struct dram_info *priv,
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struct sdram_params *params_priv);
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int rv1108_sdram_init(struct dram_info *sdram_priv,
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struct sdram_params *params_priv);
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void set_bw_grf(struct dram_info *priv);
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void set_ds_odt(struct dram_info *priv,
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struct sdram_params *params_priv);
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#endif
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