443 lines
14 KiB
C
443 lines
14 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _HAL_MCC_C_
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#include "hal_headers.h"
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#include "hal_mcc.h"
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#ifdef CONFIG_MCC_SUPPORT
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#define _mcc_fill_slot_bt_coex(_dbg_hal_i, _en) ((struct rtw_phl_mcc_dbg_hal_info *)_dbg_hal_i)->btc_in_group = _en;
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void _mcc_update_slot_dbg_info(struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i,
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bool bt_role, u16 macid, u16 dur)
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{
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struct rtw_phl_mcc_dbg_slot_info *dbg_slot_i = NULL;
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u8 idx = 0;
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for (idx = 0; idx < dbg_hal_i->slot_num; idx++) {
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dbg_slot_i = &dbg_hal_i->dbg_slot_i[idx];
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if (dbg_slot_i->bt_role) {
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if (bt_role) {
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dbg_slot_i->dur = dur;
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break;
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}
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} else if (false == bt_role && dbg_slot_i->macid == macid) {
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dbg_slot_i->dur = dur;
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break;
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}
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}
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}
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void _mcc_update_dbg_info(struct rtw_phl_mcc_en_info *info,
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struct rtw_phl_mcc_bt_info *bt_info)
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{
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u8 idx = 0;
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if (bt_info->bt_dur > 0) {
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_mcc_fill_slot_bt_coex(&info->dbg_hal_i, true);
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} else {
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_mcc_fill_slot_bt_coex(&info->dbg_hal_i, false);
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}
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for (idx = 0; idx < info->mrole_num; idx++) {
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_mcc_update_slot_dbg_info(&info->dbg_hal_i, false,
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info->mcc_role[idx].macid,
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info->mcc_role[idx].policy.dur_info.dur);
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}
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}
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void _mcc_fill_slot_dbg_info(struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i,
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struct rtw_phl_mcc_role *mrole)
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{
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struct rtw_phl_mcc_dbg_slot_info *dbg_slot_i = NULL;
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if (dbg_hal_i->slot_num >= SLOT_NUM) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_hal_dbg_info(): Fill fail, dbg_hal_i->slot_num(%d) >= SLOT_NUM(%d), please check code\n",
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dbg_hal_i->slot_num, SLOT_NUM);
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goto exit;
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}
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dbg_slot_i = &dbg_hal_i->dbg_slot_i[dbg_hal_i->slot_num];
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dbg_slot_i->bt_role = mrole->bt_role ? true : false;
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dbg_slot_i->dur = mrole->policy.dur_info.dur;
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if (false == dbg_slot_i->bt_role) {
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dbg_slot_i->ch = mrole->chandef->chan;
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dbg_slot_i->macid = mrole->macid;
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}
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dbg_hal_i->slot_num++;
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exit:
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return;
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}
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enum rtw_hal_status _mcc_add_bt_role(struct hal_info_t *hal, u8 group,
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struct rtw_phl_mcc_slot_info *slot_i,
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struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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struct rtw_phl_mcc_role mrole = {0};
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mrole.policy.dur_info.dur = (u8)slot_i->slot;
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mrole.bt_role = true;
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mrole.group = group;
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_bt_role(): add bt role\n");
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_mcc_fill_slot_dbg_info(dbg_hal_i, &mrole);
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status = rtw_hal_mac_add_mcc(hal, &mrole);
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return status;
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}
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enum rtw_hal_status _mcc_add_wifi_role(struct hal_info_t *hal,
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u8 group, struct rtw_phl_mcc_slot_info *slot_i,
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struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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struct rtw_phl_mcc_role *mrole = slot_i->mrole;
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if (NULL == mrole) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): Fail, NULL == mrole, Please check code\n");
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goto exit;
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}
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): add wifi role\n");
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mrole->group = group;
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_mcc_fill_slot_dbg_info(dbg_hal_i, mrole);
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status = rtw_hal_mac_add_mcc(hal, mrole);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): Add mcc failed\n");
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goto exit;
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}
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status = rtw_hal_mcc_update_macid_bitmap(hal, group,
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(u8)mrole->macid,
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&mrole->used_macid);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): Add MACID bitmap failed\n");
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goto exit;
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}
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exit:
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return status;
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}
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enum rtw_hal_status _mcc_fill_role_setting(struct hal_info_t *hal,
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struct rtw_phl_mcc_en_info *info)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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struct rtw_phl_mcc_slot_info *slot_i = info->m_pattern.slot_order;
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u8 i = 0;
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if (info->m_pattern.slot_num > SLOT_NUM) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Fial, slot_num(%d) > SLOT_NUM(%d), please check code\n",
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info->m_pattern.slot_num, SLOT_NUM);
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goto exit;
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} else if (info->m_pattern.slot_num < MIN_TDMRA_SLOT_NUM) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Fial, slot_num(%d) < MIN_TDMRA_SLOT_NUM(%d), please check code\n",
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info->m_pattern.slot_num, MIN_TDMRA_SLOT_NUM);
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goto exit;
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}
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for (i = 0; i < info->m_pattern.slot_num; i++) {
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if (!slot_i[i].bt_role) {
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if (RTW_HAL_STATUS_SUCCESS!= _mcc_add_wifi_role(hal,
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info->group, &slot_i[i], &info->dbg_hal_i)) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Add wifi role failed\n");
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goto exit;
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}
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} else {
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if (RTW_HAL_STATUS_SUCCESS != _mcc_add_bt_role(hal,
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info->group, &slot_i[i], &info->dbg_hal_i)) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Add bt role failed\n");
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goto exit;
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}
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}
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}
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status = RTW_HAL_STATUS_SUCCESS;
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exit:
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return status;
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}
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enum rtw_hal_status _mcc_replace_pattern(struct hal_info_t *hal,
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struct rtw_phl_mcc_en_info *ori_info,
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struct rtw_phl_mcc_en_info *new_info,
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struct rtw_phl_mcc_bt_info *new_bt_info)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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struct rtw_phl_mcc_role *ref_role =
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&new_info->mcc_role[new_info->ref_role_idx];
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bool btc_in_group = false;
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, ">>> _mcc_replace_pattern\n");
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if (RTW_HAL_STATUS_SUCCESS != rtw_hal_mac_get_mcc_group(hal, &new_info->group)) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Allocate group fail\n");
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goto exit;
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}
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_os_mem_set(hal_to_drvpriv(hal), &new_info->dbg_hal_i, 0,
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sizeof(struct rtw_phl_mcc_dbg_hal_info));
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status = _mcc_fill_role_setting(hal, new_info);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Fail fill role setting\n");
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goto exit;
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}
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if (new_info->sync_tsf_info.sync_en) {
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status = rtw_hal_mcc_sync_enable(hal, new_info);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Sync enable failed\n");
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goto exit;
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}
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}
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if (new_bt_info->bt_dur > 0) {
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btc_in_group = true;
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_mcc_fill_slot_bt_coex(&new_info->dbg_hal_i, true);
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} else {
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_mcc_fill_slot_bt_coex(&new_info->dbg_hal_i, false);
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}
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status = rtw_hal_mac_start_mcc(hal, new_info->group,
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(u8)ref_role->macid, new_info->tsf_high,
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new_info->tsf_low, btc_in_group, 1, ori_info->group);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Start MCC failed\n");
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goto exit;
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}
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status = RTW_HAL_STATUS_SUCCESS;
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exit:
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "<<< _mcc_replace_pattern(): Ststus(%d)\n",
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status);
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return status;
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}
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enum rtw_hal_status rtw_hal_mcc_get_2ports_tsf(void *hal, u8 group,
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u16 macid_x, u16 macid_y, u32 *tsf_x_h, u32 *tsf_x_l,
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u32 *tsf_y_h, u32 *tsf_y_l)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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status = rtw_hal_mac_mcc_request_tsf(hal, group, (u8)macid_x, (u8)macid_y);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_get_2ports_tsf(): Req tsf failed\n");
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goto exit;
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}
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status = rtw_hal_mac_get_mcc_tsf_rpt(hal, group, tsf_x_h, tsf_x_l,
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tsf_y_h, tsf_y_l);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_get_2ports_tsf(): Get tsf rpt failed\n");
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goto exit;
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}
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exit:
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_get_2ports_tsf(): Ststus(%d)\n",
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status);
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return status;
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}
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enum rtw_hal_status rtw_hal_notify_mcc_macid(void *hal,
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struct rtw_phl_mcc_role *mrole,
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enum rtw_phl_tdmra_wmode wmode)
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{
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enum rtw_hal_status sts = RTW_HAL_STATUS_FAILURE;
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if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
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wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
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if (sts != rtw_hal_bb_upd_mcc_macid(hal, mrole)) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "%s: Notify BB MCC MACID bitmap failed\n",
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__FUNCTION__);
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goto exit;
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}
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}
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sts = RTW_HAL_STATUS_SUCCESS;
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exit:
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return sts;
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}
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enum rtw_hal_status rtw_hal_mcc_update_macid_bitmap(void *hal, u8 group,
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u16 macid, struct rtw_phl_mcc_macid_bitmap *info)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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status = rtw_hal_mac_mcc_macid_bitmap(hal, group, (u8)macid,
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(u8 *)info->bitmap, info->len);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_update_macid_bitmap(): Add MACID bitmap failed\n");
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}
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_update_macid_bitmap(): Ststus(%d)\n",
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status);
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return status;
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}
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enum rtw_hal_status rtw_hal_mcc_sync_enable(void *hal,
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struct rtw_phl_mcc_en_info *info)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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struct rtw_phl_mcc_role *ref_role = &info->mcc_role[info->ref_role_idx];
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if (info->sync_tsf_info.sync_en) {
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status = rtw_hal_mac_mcc_sync_enable(hal, ref_role->group,
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(u8)info->sync_tsf_info.source,
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(u8)info->sync_tsf_info.target,
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(u8)info->sync_tsf_info.offset);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_sync_enable(): Sync enable failed\n");
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goto exit;
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}
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} else {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_sync_enable(): sync_en == false, please check code\n");
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goto exit;
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}
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status = RTW_HAL_STATUS_SUCCESS;
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exit:
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return status;
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}
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enum rtw_hal_status _mcc_set_duration(void *hal,
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struct rtw_phl_mcc_en_info *info,
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struct rtw_phl_mcc_bt_info *bt_info)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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status = rtw_hal_mac_set_duration(hal, info, bt_info);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_set_duration(): set duration failed\n");
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} else {
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_mcc_update_dbg_info(info, bt_info);
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}
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "_mcc_set_duration(): Ststus(%d)\n",
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status);
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return status;
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}
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enum rtw_hal_status rtw_hal_mcc_change_pattern(void *hal,
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struct rtw_phl_mcc_en_info *ori_info,
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struct rtw_phl_mcc_en_info *new_info,
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struct rtw_phl_mcc_bt_info *new_bt_info)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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/* mcc_set_duration only can change 2 wifi slot,
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otherwise we shall create new pattern and replace previous pattern*/
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if (new_info->m_pattern.slot_num == 2 &&
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new_info->m_pattern.bt_slot_num == 0 &&
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ori_info->m_pattern.slot_num == 2 &&
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ori_info->m_pattern.bt_slot_num == 0) {
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status = _mcc_set_duration(hal, new_info, new_bt_info);
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} else {
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status = _mcc_replace_pattern(hal, ori_info, new_info,
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new_bt_info);
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}
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_change_pattern(): status(%d)\n",
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status);
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return status;
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}
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enum rtw_hal_status rtw_hal_mcc_reset(void *hal, u8 group,
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enum rtw_phl_tdmra_wmode wmode)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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status = rtw_hal_mac_reset_mcc_group(hal, group);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_,
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"%s(): reset group(%d) failed\n",
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__func__, group);
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goto exit;
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}
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if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
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wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
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rtw_hal_bb_mcc_stop(hal);
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}
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status = RTW_HAL_STATUS_SUCCESS;
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exit:
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "%s(): status(%d)\n",
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__func__, status);
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return status;
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}
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enum rtw_hal_status rtw_hal_mcc_disable(void *hal, u8 group, u16 macid,
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enum rtw_phl_tdmra_wmode wmode)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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status = rtw_hal_mac_stop_mcc(hal, group, (u8)macid);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_disable(): Stop mcc failed\n");
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goto exit;
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}
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status = rtw_hal_mac_del_mcc_group(hal, group);
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if (status != RTW_HAL_STATUS_SUCCESS) {
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PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_disable(): Delete group failed\n");
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goto exit;
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}
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if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
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wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
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rtw_hal_bb_mcc_stop(hal);
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}
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#ifdef RTW_WKARD_HALRF_MCC
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rtw_hal_rf_dpk_switch(hal, true);
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#endif /* RTW_WKARD_HALRF_MCC */
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status = RTW_HAL_STATUS_SUCCESS;
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exit:
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PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_disable(): Ststus(%d)\n",
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status);
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return status;
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}
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enum rtw_hal_status rtw_hal_mcc_enable(void *hal, struct rtw_phl_mcc_en_info *info,
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struct rtw_phl_mcc_bt_info *bt_info,
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enum rtw_phl_tdmra_wmode wmode)
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{
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enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
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struct rtw_phl_mcc_role *ref_role = &info->mcc_role[info->ref_role_idx];
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bool btc_in_group = false;
|
|
|
|
if (RTW_HAL_STATUS_SUCCESS != rtw_hal_mac_get_mcc_group(hal, &info->group)) {
|
|
PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Allocate group fail\n");
|
|
goto exit;
|
|
}
|
|
#ifdef RTW_WKARD_HALRF_MCC
|
|
rtw_hal_rf_dpk_switch(hal, false);
|
|
#endif /* RTW_WKARD_HALRF_MCC */
|
|
if (RTW_HAL_STATUS_SUCCESS != _mcc_fill_role_setting(hal, info)) {
|
|
PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Fail fill role setting\n");
|
|
goto exit;
|
|
}
|
|
/*fill start setting*/
|
|
if (info->sync_tsf_info.sync_en) {
|
|
status = rtw_hal_mcc_sync_enable(hal, info);
|
|
if (status != RTW_HAL_STATUS_SUCCESS) {
|
|
PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Sync enable failed\n");
|
|
goto exit;
|
|
}
|
|
}
|
|
if (bt_info->bt_dur > 0) {
|
|
btc_in_group = true;
|
|
_mcc_fill_slot_bt_coex(&info->dbg_hal_i, true);
|
|
} else {
|
|
_mcc_fill_slot_bt_coex(&info->dbg_hal_i, false);
|
|
}
|
|
status = rtw_hal_mac_start_mcc(hal, info->group,
|
|
(u8)ref_role->macid, info->tsf_high,
|
|
info->tsf_low, btc_in_group, 0, 0);
|
|
if (status != RTW_HAL_STATUS_SUCCESS) {
|
|
PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Start MCC failed\n");
|
|
goto exit;
|
|
}
|
|
|
|
if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
|
|
wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
|
|
status = rtw_hal_bb_mcc_start(hal, &info->mcc_role[0],
|
|
&info->mcc_role[1]);
|
|
if (status != RTW_HAL_STATUS_SUCCESS) {
|
|
PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Notify MCC start failed\n");
|
|
}
|
|
}
|
|
|
|
status = RTW_HAL_STATUS_SUCCESS;
|
|
exit:
|
|
PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_enable(): Ststus(%d)\n",
|
|
status);
|
|
return status;
|
|
}
|
|
#endif /* CONFIG_MCC_SUPPORT */
|