54 lines
2.0 KiB
Diff
54 lines
2.0 KiB
Diff
From ee76e64ee1cb232b77652b21cc94ec6b6c7e4b13 Mon Sep 17 00:00:00 2001
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From: Hitendra Prajapati <hprajapati@mvista.com>
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Date: Wed, 27 Jul 2022 10:49:47 +0530
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Subject: [PATCH] CVE-2022-35414
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Upstream-Status: Backport [https://github.com/qemu/qemu/commit/418ade7849ce7641c0f7333718caf5091a02fd4c]
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CVE: CVE-2022-35414
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Signed-off-by: Hitendra Prajapati <hprajapati@mvista.com>
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---
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softmmu/physmem.c | 13 ++++++++++++-
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1 file changed, 12 insertions(+), 1 deletion(-)
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diff --git a/softmmu/physmem.c b/softmmu/physmem.c
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index 3524c04c2..3c467527d 100644
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--- a/softmmu/physmem.c
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+++ b/softmmu/physmem.c
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@@ -667,7 +667,7 @@ void tcg_iommu_init_notifier_list(CPUState *cpu)
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/* Called from RCU critical section */
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MemoryRegionSection *
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-address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
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+address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr,
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hwaddr *xlat, hwaddr *plen,
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MemTxAttrs attrs, int *prot)
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{
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@@ -676,6 +676,7 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
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IOMMUMemoryRegionClass *imrc;
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IOMMUTLBEntry iotlb;
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int iommu_idx;
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+ hwaddr addr = orig_addr;
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AddressSpaceDispatch *d =
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qatomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
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@@ -720,6 +721,16 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
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return section;
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translate_fail:
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+ /*
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+ * We should be given a page-aligned address -- certainly
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+ * tlb_set_page_with_attrs() does so. The page offset of xlat
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+ * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0.
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+ * The page portion of xlat will be logged by memory_region_access_valid()
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+ * when this memory access is rejected, so use the original untranslated
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+ * physical address.
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+ */
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+ assert((orig_addr & ~TARGET_PAGE_MASK) == 0);
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+ *xlat = orig_addr;
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return &d->map.sections[PHYS_SECTION_UNASSIGNED];
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}
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--
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2.25.1
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