65 lines
2.7 KiB
C
65 lines
2.7 KiB
C
/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_GPIO_H
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#define _ASM_ARCH_GPIO_H
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#ifndef CONFIG_ROCKCHIP_GPIO_V2
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struct rockchip_gpio_regs {
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u32 swport_dr;
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u32 swport_ddr;
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u32 reserved0[(0x30 - 0x08) / 4];
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u32 inten;
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u32 intmask;
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u32 inttype_level;
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u32 int_polarity;
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u32 int_status;
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u32 int_rawstatus;
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u32 debounce;
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u32 porta_eoi;
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u32 ext_port;
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u32 reserved1[(0x60 - 0x54) / 4];
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u32 ls_sync;
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};
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check_member(rockchip_gpio_regs, ls_sync, 0x60);
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#else
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struct rockchip_gpio_regs {
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u32 swport_dr_l; /* ADDRESS OFFSET: 0x0000 */
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u32 swport_dr_h; /* ADDRESS OFFSET: 0x0004 */
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u32 swport_ddr_l; /* ADDRESS OFFSET: 0x0008 */
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u32 swport_ddr_h; /* ADDRESS OFFSET: 0x000c */
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u32 int_en_l; /* ADDRESS OFFSET: 0x0010 */
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u32 int_en_h; /* ADDRESS OFFSET: 0x0014 */
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u32 int_mask_l; /* ADDRESS OFFSET: 0x0018 */
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u32 int_mask_h; /* ADDRESS OFFSET: 0x001c */
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u32 int_type_l; /* ADDRESS OFFSET: 0x0020 */
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u32 int_type_h; /* ADDRESS OFFSET: 0x0024 */
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u32 int_polarity_l; /* ADDRESS OFFSET: 0x0028 */
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u32 int_polarity_h; /* ADDRESS OFFSET: 0x002c */
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u32 int_bothedge_l; /* ADDRESS OFFSET: 0x0030 */
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u32 int_bothedge_h; /* ADDRESS OFFSET: 0x0034 */
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u32 debounce_l; /* ADDRESS OFFSET: 0x0038 */
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u32 debounce_h; /* ADDRESS OFFSET: 0x003c */
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u32 dbclk_div_en_l; /* ADDRESS OFFSET: 0x0040 */
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u32 dbclk_div_en_h; /* ADDRESS OFFSET: 0x0044 */
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u32 dbclk_div_con; /* ADDRESS OFFSET: 0x0048 */
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u32 reserved004c; /* ADDRESS OFFSET: 0x004c */
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u32 int_status; /* ADDRESS OFFSET: 0x0050 */
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u32 reserved0054; /* ADDRESS OFFSET: 0x0054 */
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u32 int_rawstatus; /* ADDRESS OFFSET: 0x0058 */
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u32 reserved005c; /* ADDRESS OFFSET: 0x005c */
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u32 port_eoi_l; /* ADDRESS OFFSET: 0x0060 */
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u32 port_eoi_h; /* ADDRESS OFFSET: 0x0064 */
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u32 reserved0068[2]; /* ADDRESS OFFSET: 0x0068 */
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u32 ext_port; /* ADDRESS OFFSET: 0x0070 */
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u32 reserved0074; /* ADDRESS OFFSET: 0x0074 */
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u32 ver_id; /* ADDRESS OFFSET: 0x0078 */
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};
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check_member(rockchip_gpio_regs, ver_id, 0x0078);
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#endif
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#endif
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