2025-05-10 21:49:39 +08:00

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/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/media-bus-format.h>
#include "rk3399-vop-clk-set.dtsi"
#include <dt-bindings/input/input.h>
/ {
compatible = "rockchip,android", "rockchip,rk3399";
chosen: chosen {
bootargs = "earlycon=uart8250,mmio32,0xff1a0000 coherent_pool=1m";
};
cpuinfo {
compatible = "rockchip,cpuinfo";
nvmem-cells = <&cpu_id>;
nvmem-cell-names = "id";
};
fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
pinctrl-names = "default";
pinctrl-0 = <&uart2c_xfer>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
drm_logo: drm-logo@00000000 {
compatible = "rockchip,drm-logo";
reg = <0x0 0x0 0x0 0x0>;
};
ramoops: ramoops@110000 {
compatible = "ramoops";
reg = <0x0 0x110000 0x0 0xf0000>;
record-size = <0x20000>;
console-size = <0x80000>;
ftrace-size = <0x00000>;
pmsg-size = <0x50000>;
};
secure_memory: secure-memory@20000000 {
compatible = "rockchip,secure-memory";
reg = <0x0 0x20000000 0x0 0x10000000>;
status = "disabled";
};
stb_devinfo: stb-devinfo@00000000 {
compatible = "rockchip,stb-devinfo";
reg = <0x0 0x0 0x0 0x0>;
};
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&pwrbtn>;
power {
debounce-interval = <100>;
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
label = "GPIO Key Power";
linux,code = <KEY_POWER>;
wakeup-source;
};
};
rga: rga@ff680000 {
compatible = "rockchip,rga2";
dev_mode = <1>;
reg = <0x0 0xff680000 0x0 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
power-domains = <&power RK3399_PD_RGA>;
status = "okay";
};
hdmi_dp_sound: hdmi-dp-sound {
status = "disabled";
compatible = "rockchip,rk3399-hdmi-dp";
rockchip,cpu = <&i2s2>;
rockchip,codec = <&hdmi>, <&cdn_dp>;
};
firmware {
firmware_android: android {};
};
};
&uart2 {
status = "disabled";
};
&vopb {
support-multi-area;
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
support-multi-area;
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&hdmi {
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <0>;
ddc-i2c-scl-high-time-ns = <9625>;
ddc-i2c-scl-low-time-ns = <10000>;
status = "okay";
};
&display_subsystem {
status = "okay";
ports = <&vopb_out>, <&vopl_out>;
logo-memory-region = <&drm_logo>;
secure-memory-region = <&secure_memory>;
route {
route_hdmi: route-hdmi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_hdmi>;
};
route_dsi: route-dsi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_dsi>;
};
route_dsi1: route-dsi1 {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopl_out_dsi1>;
};
route_edp: route-edp {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_edp>;
};
};
};
&dsi {
panel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&i2s2 {
#sound-dai-cells = <0>;
rockchip,bclk-fs = <128>;
};
&rkvdec {
status = "okay";
};
&rkvdec_mmu {
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};
&vdpu {
status = "okay";
};
&vepu {
status = "okay";
};
&vpu_mmu {
status = "okay";
};
&pvtm {
status = "okay";
};
&rng {
status = "okay";
};
&pinctrl {
isp {
cif_clkout: cif-clkout {
rockchip,pins =
/*cif_clkout*/
<2 RK_PB3 3 &pcfg_pull_none>;
};
isp_dvp_d0d7: isp-dvp-d0d7 {
rockchip,pins =
/*cif_data0*/
<2 RK_PA0 3 &pcfg_pull_none>,
/*cif_data1*/
<2 RK_PA1 3 &pcfg_pull_none>,
/*cif_data2*/
<2 RK_PA2 3 &pcfg_pull_none>,
/*cif_data3*/
<2 RK_PA3 3 &pcfg_pull_none>,
/*cif_data4*/
<2 RK_PA4 3 &pcfg_pull_none>,
/*cif_data5*/
<2 RK_PA5 3 &pcfg_pull_none>,
/*cif_data6*/
<2 RK_PA6 3 &pcfg_pull_none>,
/*cif_data7*/
<2 RK_PA7 3 &pcfg_pull_none>,
/*cif_sync*/
<2 RK_PB0 3 &pcfg_pull_none>,
/*cif_href*/
<2 RK_PB1 3 &pcfg_pull_none>,
/*cif_clkin*/
<2 RK_PB2 3 &pcfg_pull_none>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};