1027 lines
21 KiB
Plaintext
1027 lines
21 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include <dt-bindings/display/drm_mipi_dsi.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/pinctrl/rockchip.h>
|
|
#include <dt-bindings/sensor-dev.h>
|
|
#include "rk3326.dtsi"
|
|
#include "rk3326-linux.dtsi"
|
|
|
|
/ {
|
|
model = "Rockchip rk3326 evb lpddr3 v10 board for linux";
|
|
compatible = "rockchip,rk3326-evb-lp3-v10-linux", "rockchip,rk3326";
|
|
|
|
chosen {
|
|
bootargs = "earlycon=uart8250,mmio32,0xff160000 console=ttyFIQ0 rw root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait";
|
|
};
|
|
|
|
adc-keys {
|
|
compatible = "adc-keys";
|
|
io-channels = <&saradc 2>;
|
|
io-channel-names = "buttons";
|
|
poll-interval = <100>;
|
|
keyup-threshold-microvolt = <1800000>;
|
|
|
|
esc-key {
|
|
linux,code = <KEY_ESC>;
|
|
label = "esc";
|
|
press-threshold-microvolt = <1310000>;
|
|
};
|
|
|
|
home-key {
|
|
linux,code = <KEY_HOME>;
|
|
label = "home";
|
|
press-threshold-microvolt = <624000>;
|
|
};
|
|
|
|
menu-key {
|
|
linux,code = <KEY_MENU>;
|
|
label = "menu";
|
|
press-threshold-microvolt = <987000>;
|
|
};
|
|
|
|
vol-down-key {
|
|
linux,code = <KEY_VOLUMEDOWN>;
|
|
label = "volume down";
|
|
press-threshold-microvolt = <300000>;
|
|
};
|
|
|
|
vol-up-key {
|
|
linux,code = <KEY_VOLUMEUP>;
|
|
label = "volume up";
|
|
press-threshold-microvolt = <17000>;
|
|
};
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm1 0 25000 0>;
|
|
brightness-levels = <
|
|
0 1 2 3 4 5 6 7
|
|
8 9 10 11 12 13 14 15
|
|
16 17 18 19 20 21 22 23
|
|
24 25 26 27 28 29 30 31
|
|
32 33 34 35 36 37 38 39
|
|
40 41 42 43 44 45 46 47
|
|
48 49 50 51 52 53 54 55
|
|
56 57 58 59 60 61 62 63
|
|
64 65 66 67 68 69 70 71
|
|
72 73 74 75 76 77 78 79
|
|
80 81 82 83 84 85 86 87
|
|
88 89 90 91 92 93 94 95
|
|
96 97 98 99 100 101 102 103
|
|
104 105 106 107 108 109 110 111
|
|
112 113 114 115 116 117 118 119
|
|
120 121 122 123 124 125 126 127
|
|
128 129 130 131 132 133 134 135
|
|
136 137 138 139 140 141 142 143
|
|
144 145 146 147 148 149 150 151
|
|
152 153 154 155 156 157 158 159
|
|
160 161 162 163 164 165 166 167
|
|
168 169 170 171 172 173 174 175
|
|
176 177 178 179 180 181 182 183
|
|
184 185 186 187 188 189 190 191
|
|
192 193 194 195 196 197 198 199
|
|
200 201 202 203 204 205 206 207
|
|
208 209 210 211 212 213 214 215
|
|
216 217 218 219 220 221 222 223
|
|
224 225 226 227 228 229 230 231
|
|
232 233 234 235 236 237 238 239
|
|
240 241 242 243 244 245 246 247
|
|
248 249 250 251 252 253 254 255>;
|
|
default-brightness-level = <200>;
|
|
};
|
|
|
|
rk817-sound {
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,name = "rockchip,rk817-codec";
|
|
simple-audio-card,mclk-fs = <256>;
|
|
simple-audio-card,widgets =
|
|
"Microphone", "Mic Jack",
|
|
"Headphone", "Headphone Jack";
|
|
simple-audio-card,routing =
|
|
"MIC_IN", "Microphone Jack",
|
|
"IN1P", "Mic Jack",
|
|
"Headphone Jack", "HPOL",
|
|
"Headphone Jack", "HPOR";
|
|
simple-audio-card,cpu {
|
|
sound-dai = <&i2s1_2ch>;
|
|
};
|
|
simple-audio-card,codec {
|
|
sound-dai = <&rk817_codec>;
|
|
};
|
|
};
|
|
|
|
rk_headset {
|
|
compatible = "rockchip_headset";
|
|
headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&hp_det>;
|
|
io-channels = <&saradc 1>;
|
|
};
|
|
|
|
sdio_pwrseq: sdio-pwrseq {
|
|
compatible = "mmc-pwrseq-simple";
|
|
/*clocks = <&rk817 1>;*/
|
|
/*clock-names = "ext_clock";*/
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wifi_enable_h>;
|
|
|
|
/*
|
|
* On the module itself this is one of these (depending
|
|
* on the actual card populated):
|
|
* - SDIO_RESET_L_WL_REG_ON
|
|
* - PDN (power down when low)
|
|
*/
|
|
reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
|
|
};
|
|
|
|
vccsys: vccsys {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc3v8_sys";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3800000>;
|
|
regulator-max-microvolt = <3800000>;
|
|
};
|
|
|
|
wireless-wlan {
|
|
compatible = "wlan-platdata";
|
|
wifi_chip_type = "AP6210";
|
|
WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
wireless-bluetooth {
|
|
compatible = "bluetooth-platdata";
|
|
clocks = <&rk817 1>;
|
|
clock-names = "ext_clock";
|
|
uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
|
|
pinctrl-names = "default","rts_gpio";
|
|
pinctrl-0 = <&uart1_rts>;
|
|
pinctrl-1 = <&uart1_rts_gpio>;
|
|
BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
|
|
BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
|
|
BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
vcc18_lcd_n: vcc18-lcd-n {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc18_lcd_n";
|
|
regulator-boot-on;
|
|
gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
};
|
|
|
|
&bus_apll {
|
|
bus-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&cif_new {
|
|
status = "okay";
|
|
|
|
port {
|
|
cif_in: endpoint {
|
|
remote-endpoint = <&gc2155_out>;
|
|
vsync-active = <0>;
|
|
hsync-active = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
&display_subsystem {
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi {
|
|
status = "okay";
|
|
|
|
panel@0 {
|
|
compatible = "sitronix,st7703", "simple-panel-dsi";
|
|
reg = <0>;
|
|
backlight = <&backlight>;
|
|
power-supply = <&vcc18_lcd_n>;
|
|
prepare-delay-ms = <2>;
|
|
reset-delay-ms = <1>;
|
|
init-delay-ms = <20>;
|
|
enable-delay-ms = <120>;
|
|
disable-delay-ms = <50>;
|
|
unprepare-delay-ms = <20>;
|
|
|
|
width-mm = <68>;
|
|
height-mm = <121>;
|
|
|
|
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
|
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
|
|
dsi,format = <MIPI_DSI_FMT_RGB888>;
|
|
dsi,lanes = <4>;
|
|
|
|
panel-init-sequence = [
|
|
05 fa 01 11
|
|
39 00 04 b9 f1 12 83
|
|
39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
|
|
00 00 00 00 00 44 25 00 91 0a
|
|
00 00 02 4f 01 00 00 37
|
|
15 00 02 b8 25
|
|
39 00 04 bf 02 11 00
|
|
39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
|
|
00
|
|
39 00 0a c0 73 73 50 50 00 00 08 70 00
|
|
15 00 02 bc 46
|
|
15 00 02 cc 0b
|
|
15 00 02 b4 80
|
|
39 00 04 b2 c8 12 30
|
|
39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
|
|
00 ff 00 c0 10
|
|
39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
|
|
77 33 33
|
|
39 00 07 c6 00 00 ff ff 01 ff
|
|
39 00 03 b5 09 09
|
|
39 00 03 b6 87 95
|
|
39 00 40 e9 c2 10 05 05 10 05 a0 12 31
|
|
23 3f 81 0a a0 37 18 00 80 01
|
|
00 00 00 00 80 01 00 00 00 48
|
|
f8 86 42 08 88 88 80 88 88 88
|
|
58 f8 87 53 18 88 88 81 88 88
|
|
88 00 00 00 01 00 00 00 00 00
|
|
00 00 00 00
|
|
39 00 3e ea 00 1a 00 00 00 00 02 00 00
|
|
00 00 00 1f 88 81 35 78 88 88
|
|
85 88 88 88 0f 88 80 24 68 88
|
|
88 84 88 88 88 23 10 00 00 1c
|
|
00 00 00 00 00 00 00 00 00 00
|
|
00 00 00 00 00 30 05 a0 00 00
|
|
00 00
|
|
39 00 23 e0 00 06 08 2a 31 3f 38 36 07
|
|
0c 0d 11 13 12 13 11 18 00 06
|
|
08 2a 31 3f 38 36 07 0c 0d 11
|
|
13 12 13 11 18
|
|
05 32 01 29
|
|
];
|
|
|
|
panel-exit-sequence = [
|
|
05 00 01 28
|
|
05 00 01 10
|
|
];
|
|
|
|
display-timings {
|
|
native-mode = <&timing0>;
|
|
|
|
timing0: timing0 {
|
|
clock-frequency = <66000000>;
|
|
hactive = <720>;
|
|
vactive = <1280>;
|
|
hfront-porch = <40>;
|
|
hsync-len = <10>;
|
|
hback-porch = <40>;
|
|
vfront-porch = <22>;
|
|
vsync-len = <4>;
|
|
vback-porch = <11>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
panel_in_dsi: endpoint {
|
|
remote-endpoint = <&dsi_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi_out_panel: endpoint {
|
|
remote-endpoint = <&panel_in_dsi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi_in_vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&route_dsi {
|
|
connect = <&vopb_out_dsi>;
|
|
status = "okay";
|
|
};
|
|
|
|
&dfi {
|
|
status = "okay";
|
|
};
|
|
|
|
&dmc {
|
|
center-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&emmc {
|
|
bus-width = <8>;
|
|
cap-mmc-highspeed;
|
|
mmc-hs200-1_8v;
|
|
supports-emmc;
|
|
disable-wp;
|
|
non-removable;
|
|
num-slots = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gpu {
|
|
mali-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
i2c-scl-rising-time-ns = <280>;
|
|
i2c-scl-falling-time-ns = <16>;
|
|
|
|
rk817: pmic@20 {
|
|
compatible = "rockchip,rk817";
|
|
reg = <0x20>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default", "pmic-sleep",
|
|
"pmic-power-off", "pmic-reset";
|
|
pinctrl-0 = <&pmic_int>;
|
|
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
|
|
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
|
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
|
|
rockchip,system-power-controller;
|
|
wakeup-source;
|
|
#clock-cells = <1>;
|
|
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
|
//fb-inner-reg-idxs = <2>;
|
|
/* 1: rst regs (default in codes), 0: rst the pmic */
|
|
pmic-reset-func = <1>;
|
|
|
|
vcc1-supply = <&vccsys>;
|
|
vcc2-supply = <&vccsys>;
|
|
vcc3-supply = <&vccsys>;
|
|
vcc4-supply = <&vccsys>;
|
|
vcc5-supply = <&vccsys>;
|
|
vcc6-supply = <&vccsys>;
|
|
vcc7-supply = <&vcc_3v0>;
|
|
vcc8-supply = <&vccsys>;
|
|
vcc9-supply = <&dcdc_boost>;
|
|
|
|
pwrkey {
|
|
status = "okay";
|
|
};
|
|
|
|
pinctrl_rk8xx: pinctrl_rk8xx {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
rk817_ts_gpio1: rk817_ts_gpio1 {
|
|
pins = "gpio_ts";
|
|
function = "pin_fun1";
|
|
/* output-low; */
|
|
/* input-enable; */
|
|
};
|
|
|
|
rk817_gt_gpio2: rk817_gt_gpio2 {
|
|
pins = "gpio_gt";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
rk817_pin_ts: rk817_pin_ts {
|
|
pins = "gpio_ts";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk817_pin_gt: rk817_pin_gt {
|
|
pins = "gpio_gt";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk817_slppin_null: rk817_slppin_null {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk817_slppin_slp: rk817_slppin_slp {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun2";
|
|
};
|
|
|
|
rk817_slppin_rst: rk817_slppin_rst {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun3";
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
vdd_logic: DCDC_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vdd_logic";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
};
|
|
};
|
|
|
|
vdd_arm: DCDC_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vdd_arm";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
};
|
|
};
|
|
|
|
vcc_ddr: DCDC_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vcc_ddr";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_3v0: DCDC_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vcc_3v0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v0: LDO_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-name = "vcc_1v0";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
};
|
|
};
|
|
|
|
vcc1v8_soc: LDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-name = "vcc1v8_soc";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd1v0_soc: LDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
regulator-name = "vcc1v0_soc";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
};
|
|
};
|
|
|
|
vcc3v0_pmu: LDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "vcc3v0_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
|
|
};
|
|
};
|
|
|
|
vccio_sd: LDO_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-name = "vccio_sd";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc_sd: LDO_REG6 {
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
|
|
regulator-name = "vcc_sd";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
|
|
};
|
|
};
|
|
|
|
vcc2v8_dvp: LDO_REG7 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
regulator-name = "vcc2v8_dvp";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <2800000>;
|
|
};
|
|
};
|
|
|
|
vcc1v8_dvp: LDO_REG8 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-name = "vcc1v8_dvp";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd1v5_dvp: LDO_REG9 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
regulator-name = "vdd1v5_dvp";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <1500000>;
|
|
};
|
|
};
|
|
|
|
dcdc_boost: BOOST {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <4700000>;
|
|
regulator-max-microvolt = <5400000>;
|
|
regulator-name = "boost";
|
|
};
|
|
|
|
otg_switch: OTG_SWITCH {
|
|
regulator-name = "otg_switch";
|
|
};
|
|
};
|
|
|
|
battery {
|
|
compatible = "rk817,battery";
|
|
ocv_table = <3500 3625 3685 3697 3718 3735 3748
|
|
3760 3774 3788 3802 3816 3834 3853
|
|
3877 3908 3946 3975 4018 4071 4106>;
|
|
design_capacity = <2500>;
|
|
design_qmax = <2750>;
|
|
bat_res = <100>;
|
|
sleep_enter_current = <300>;
|
|
sleep_exit_current = <300>;
|
|
sleep_filter_current = <100>;
|
|
power_off_thresd = <3500>;
|
|
zero_algorithm_vol = <3850>;
|
|
max_soc_offset = <60>;
|
|
monitor_sec = <5>;
|
|
sample_res = <10>;
|
|
virtual_power = <1>;
|
|
};
|
|
|
|
charger {
|
|
compatible = "rk817,charger";
|
|
min_input_voltage = <4500>;
|
|
max_input_current = <1500>;
|
|
max_chrg_current = <2000>;
|
|
max_chrg_voltage = <4200>;
|
|
chrg_term_mode = <0>;
|
|
chrg_finish_cur = <300>;
|
|
virtual_power = <0>;
|
|
dc_det_adc = <0>;
|
|
extcon = <&u2phy>;
|
|
};
|
|
|
|
rk817_codec: codec {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "rockchip,rk817-codec";
|
|
clocks = <&cru SCLK_I2S1_OUT>;
|
|
clock-names = "mclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s1_2ch_mclk>;
|
|
hp-volume = <20>;
|
|
spk-volume = <3>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
i2c-scl-rising-time-ns = <275>;
|
|
i2c-scl-falling-time-ns = <16>;
|
|
|
|
sensor@f {
|
|
status = "okay";
|
|
compatible = "ak8963";
|
|
reg = <0x0f>;
|
|
type = <SENSOR_TYPE_COMPASS>;
|
|
irq_enable = <0>;
|
|
poll_delay_ms = <30>;
|
|
layout = <1>;
|
|
reprobe_en = <1>;
|
|
};
|
|
|
|
gt1x: gt1x@14 {
|
|
compatible = "goodix,gt1x";
|
|
reg = <0x14>;
|
|
power-supply = <&vcc18_lcd_n>;
|
|
goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
|
|
goodix,irq-gpio = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>;
|
|
};
|
|
|
|
sensor@4c {
|
|
status = "okay";
|
|
compatible = "gs_mma7660";
|
|
reg = <0x4c>;
|
|
type = <SENSOR_TYPE_ACCEL>;
|
|
irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
|
|
irq_enable = <0>;
|
|
poll_delay_ms = <30>;
|
|
layout = <1>;
|
|
reprobe_en = <1>;
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
/* 24M mclk is shared for multiple cameras */
|
|
pinctrl-0 = <&i2c2_xfer &cif_clkout_m0>;
|
|
|
|
/* These are relatively safe rise/fall times; TODO: measure */
|
|
i2c-scl-falling-time-ns = <50>;
|
|
i2c-scl-rising-time-ns = <300>;
|
|
|
|
gc2155: gc2155@3c {
|
|
compatible = "gc,gc2155";
|
|
reg = <0x3c>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cif_pin_m0>;
|
|
|
|
clocks = <&cru SCLK_CIF_OUT>;
|
|
clock-names = "xvclk";
|
|
|
|
avdd-supply = <&vcc2v8_dvp>;
|
|
dovdd-supply = <&vcc1v8_dvp>;
|
|
dvdd-supply = <&vcc1v8_dvp>;
|
|
|
|
/* hw changed the pwdn to gpio2_b5 */
|
|
pwdn-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
|
|
|
port {
|
|
gc2155_out: endpoint {
|
|
remote-endpoint = <&cif_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ov5695: ov5695@36 {
|
|
compatible = "ovti,ov5695";
|
|
reg = <0x36>;
|
|
|
|
clocks = <&cru SCLK_CIF_OUT>;
|
|
clock-names = "xvclk";
|
|
|
|
avdd-supply = <&vcc2v8_dvp>;
|
|
dovdd-supply = <&vcc1v8_dvp>;
|
|
dvdd-supply = <&vdd1v5_dvp>;
|
|
|
|
/*reset-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;*/
|
|
pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
|
|
|
|
rockchip,camera-module-index = <0>;
|
|
rockchip,camera-module-facing = "back";
|
|
rockchip,camera-module-name = "TongJu";
|
|
rockchip,camera-module-lens-name = "CHT842-MD";
|
|
|
|
port {
|
|
ucam_out: endpoint {
|
|
remote-endpoint = <&mipi_in_ucam>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2s1_2ch {
|
|
status = "okay";
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
&io_domains {
|
|
status = "okay";
|
|
|
|
vccio1-supply = <&vcc1v8_soc>;
|
|
vccio2-supply = <&vccio_sd>;
|
|
vccio3-supply = <&vcc1v8_dvp>;
|
|
vccio4-supply = <&vcc_3v0>;
|
|
vccio5-supply = <&vcc_3v0>;
|
|
};
|
|
|
|
&isp_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mipi_dphy_rx0 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_in_ucam: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&ucam_out>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
dphy_rx0_out: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&isp0_mipi_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&nandc0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkisp1 {
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
isp0_mipi_in: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&dphy_rx0_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
|
|
pmuio1-supply = <&vcc3v0_pmu>;
|
|
pmuio2-supply = <&vcc3v0_pmu>;
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rk_rga {
|
|
status = "okay";
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
rockchip,sleep-debug-en = <1>;
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcc1v8_soc>;
|
|
};
|
|
|
|
&sdmmc {
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
supports-sd;
|
|
card-detect-delay = <800>;
|
|
ignore-pm-notify;
|
|
/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
|
|
sd-uhs-sdr12;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
vqmmc-supply = <&vccio_sd>;
|
|
vmmc-supply = <&vcc_sd>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&sdio {
|
|
bus-width = <4>;
|
|
cap-sd-highspeed;
|
|
supports-sdio;
|
|
ignore-pm-notify;
|
|
keep-power-in-suspend;
|
|
non-removable;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
pinctrl-names = "gpio", "otpout";
|
|
pinctrl-0 = <&tsadc_otp_gpio>;
|
|
pinctrl-1 = <&tsadc_otp_out>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy {
|
|
status = "okay";
|
|
|
|
u2phy_host: host-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&usb20_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_xfer &uart1_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
&vip_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&hevc {
|
|
status = "okay";
|
|
};
|
|
|
|
&hevc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
cif-pin-m0 {
|
|
cif_pin_m0: cif-pin-m0 {
|
|
rockchip,pins =
|
|
<2 RK_PA0 1 &pcfg_pull_none>,/* cif_data2 */
|
|
<2 RK_PA1 1 &pcfg_pull_none>,/* cif_data3 */
|
|
<2 RK_PA2 1 &pcfg_pull_none>,/* cif_data4 */
|
|
<2 RK_PA3 1 &pcfg_pull_none>,/* cif_data5 */
|
|
<2 RK_PA4 1 &pcfg_pull_none>,/* cif_data6 */
|
|
<2 RK_PA5 1 &pcfg_pull_none>,/* cif_data7 */
|
|
<2 RK_PA6 1 &pcfg_pull_none>,/* cif_data8 */
|
|
<2 RK_PA7 1 &pcfg_pull_none>,/* cif_data9 */
|
|
<2 RK_PB0 1 &pcfg_pull_none>,/* cif_sync */
|
|
<2 RK_PB1 1 &pcfg_pull_none>,/* cif_href */
|
|
<2 RK_PB2 1 &pcfg_pull_none>;/* cif_clkin */
|
|
};
|
|
};
|
|
|
|
headphone {
|
|
hp_det: hp-det {
|
|
rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int: pmic_int {
|
|
rockchip,pins =
|
|
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
soc_slppin_gpio: soc_slppin_gpio {
|
|
rockchip,pins =
|
|
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
|
|
};
|
|
|
|
soc_slppin_slp: soc_slppin_slp {
|
|
rockchip,pins =
|
|
<0 RK_PA4 1 &pcfg_pull_none>;
|
|
};
|
|
|
|
soc_slppin_rst: soc_slppin_rst {
|
|
rockchip,pins =
|
|
<0 RK_PA4 2 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */
|
|
/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */
|
|
/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */
|