771 lines
15 KiB
Plaintext
771 lines
15 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
|
*/
|
|
|
|
#include "rv1126.dtsi"
|
|
#include "rv1126-bat-ipc.dtsi"
|
|
#include "rv1126-thunder-boot-emmc.dtsi"
|
|
#include <dt-bindings/display/drm_mipi_dsi.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
adc-keys {
|
|
compatible = "adc-keys";
|
|
io-channels = <&saradc 0>;
|
|
io-channel-names = "buttons";
|
|
poll-interval = <100>;
|
|
keyup-threshold-microvolt = <1800000>;
|
|
|
|
recovery {
|
|
label = "Volum_up";
|
|
linux,code = <KEY_VOLUMEUP>;
|
|
press-threshold-microvolt = <60000>;
|
|
};
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm6 0 25000 0>;
|
|
brightness-levels = <
|
|
0 1 2 3 4 5 6 7
|
|
8 9 10 11 12 13 14 15
|
|
16 17 18 19 20 21 22 23
|
|
24 25 26 27 28 29 30 31
|
|
32 33 34 35 36 37 38 39
|
|
40 41 42 43 44 45 46 47
|
|
48 49 50 51 52 53 54 55
|
|
56 57 58 59 60 61 62 63
|
|
64 65 66 67 68 69 70 71
|
|
72 73 74 75 76 77 78 79
|
|
80 81 82 83 84 85 86 87
|
|
88 89 90 91 92 93 94 95
|
|
96 97 98 99 100 101 102 103
|
|
104 105 106 107 108 109 110 111
|
|
112 113 114 115 116 117 118 119
|
|
120 121 122 123 124 125 126 127
|
|
128 129 130 131 132 133 134 135
|
|
136 137 138 139 140 141 142 143
|
|
144 145 146 147 148 149 150 151
|
|
152 153 154 155 156 157 158 159
|
|
160 161 162 163 164 165 166 167
|
|
168 169 170 171 172 173 174 175
|
|
176 177 178 179 180 181 182 183
|
|
184 185 186 187 188 189 190 191
|
|
192 193 194 195 196 197 198 199
|
|
200 201 202 203 204 205 206 207
|
|
208 209 210 211 212 213 214 215
|
|
216 217 218 219 220 221 222 223
|
|
224 225 226 227 228 229 230 231
|
|
232 233 234 235 236 237 238 239
|
|
240 241 242 243 244 245 246 247
|
|
248 249 250 251 252 253 254 255>;
|
|
default-brightness-level = <200>;
|
|
};
|
|
|
|
cam_ircut0: cam_ircut {
|
|
status = "okay";
|
|
compatible = "rockchip,ircut";
|
|
ircut-open-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
|
|
ircut-close-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
|
|
rockchip,camera-module-index = <1>;
|
|
rockchip,camera-module-facing = "front";
|
|
};
|
|
|
|
i2s0_sound: i2s0-sound {
|
|
status = "okay";
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,mclk-fs = <256>;
|
|
simple-audio-card,name = "rockchip,i2s0-sound";
|
|
simple-audio-card,cpu {
|
|
sound-dai = <&i2s0_8ch>;
|
|
};
|
|
simple-audio-card,codec {
|
|
sound-dai = <&es8311>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
ir {
|
|
label = "ir";
|
|
gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
white {
|
|
label = "white";
|
|
gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
vcc1v2_dvdd: vcc1v8_dovdd: vcc2v8_avdd: vcc-camera {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc_camera";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
vcc_1v8: vcc-1v8 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc_1v8";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
vccio_flash: vccio-flash {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vccio_flash";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
vin-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
vccio_sd: vccio-sd {
|
|
compatible = "regulator-gpio";
|
|
regulator-name = "vccio_sd";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
|
|
states = <3300000 1
|
|
1800000 0>;
|
|
};
|
|
|
|
vcc_sd: vcc-sd {
|
|
compatible = "regulator-fixed";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&vccsd_en>;
|
|
regulator-name = "vcc_sd";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
vdd_npu: vdd-npu {
|
|
compatible = "pwm-regulator";
|
|
pwms = <&pwm1 0 5000 1>;
|
|
regulator-name = "vdd_npu";
|
|
regulator-min-microvolt = <718000>;
|
|
regulator-max-microvolt = <975000>;
|
|
regulator-init-microvolt = <813000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-settling-time-up-us = <250>;
|
|
};
|
|
|
|
vdd_vepu: vdd-vepu {
|
|
compatible = "pwm-regulator";
|
|
pwms = <&pwm2 0 5000 1>;
|
|
regulator-name = "vdd_vepu";
|
|
regulator-min-microvolt = <720000>;
|
|
regulator-max-microvolt = <880000>;
|
|
regulator-init-microvolt = <818000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-settling-time-up-us = <250>;
|
|
};
|
|
|
|
vcc18_lcd_n: vcc18-lcd-n {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc18_lcd_n";
|
|
gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
wireless_wlan: wireless-wlan {
|
|
compatible = "wlan-platdata";
|
|
rockchip,grf = <&grf>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wifi_wake_host>;
|
|
wifi_chip_type = "cy43438";
|
|
WIFI,poweren_gpio = <&gpio1 RK_PC7 GPIO_ACTIVE_LOW>;
|
|
WIFI,host_wake_irq = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&csi_dphy0 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_in_ucam0: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&ucam_out0>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
csidphy0_out: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&isp_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&emmc {
|
|
bus-width = <8>;
|
|
cap-mmc-highspeed;
|
|
non-removable;
|
|
mmc-hs200-1_8v;
|
|
rockchip,default-sample-phase = <90>;
|
|
supports-emmc;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
hym8563: hym8563@51 {
|
|
compatible = "haoyu,hym8563";
|
|
reg = <0x51>;
|
|
#clock-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
os04c10: os04c10@36 {
|
|
compatible = "ovti,os04c10";
|
|
reg = <0x36>;
|
|
clocks = <&cru CLK_MIPICSI_OUT>;
|
|
clock-names = "xvclk";
|
|
power-domains = <&power RV1126_PD_VI>;
|
|
avdd-supply = <&vcc2v8_avdd>;
|
|
dovdd-supply = <&vcc1v8_dovdd>;
|
|
dvdd-supply = <&vcc1v2_dvdd>;
|
|
pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
|
|
reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
|
|
rockchip,camera-module-index = <1>;
|
|
rockchip,camera-module-facing = "front";
|
|
rockchip,camera-module-name = "DW-RV04C";
|
|
rockchip,camera-module-lens-name = "2G2P650IR-F21";
|
|
ir-cut = <&cam_ircut0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mipicsi_clk0>;
|
|
|
|
port {
|
|
ucam_out0: endpoint {
|
|
remote-endpoint = <&mipi_in_ucam0>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
opt3001: opt3001@44 {
|
|
compatible = "ti,opt3001";
|
|
reg = <0x44>;
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
pinctrl-0 = <&i2c4m1_xfer>;
|
|
|
|
es8311: es8311@18 {
|
|
compatible = "everest,es8311";
|
|
reg = <0x18>;
|
|
clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
|
|
clock-names = "mclk";
|
|
adc-pga-gain = <6>; /* 18dB */
|
|
adc-volume = <0xbf>; /* 0dB */
|
|
dac-volume = <0x9f>; /* -16dB */
|
|
aec-mode = "dac left, adc right";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s0m0_mclk &spk_ctl>;
|
|
assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
|
|
assigned-clock-parents = <&cru MCLK_I2S0_TX>;
|
|
spk-ctl-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&i2c5 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
pinctrl-0 = <&i2c5m0_xfer>;
|
|
|
|
CW2015@62 {
|
|
compatible = "cw201x";
|
|
reg = <0x62>;
|
|
bat_config_info = <0x15 0x7E 0x7A 0x6E 0x6A 0x67 0x63 0x62 0x62 0x61 0x5E
|
|
0x59 0x56 0x57 0x51 0x3C 0x30 0x27 0x29 0x29 0x2E 0x3A
|
|
0x49 0x57 0x64 0x57 0x0B 0x85 0x30 0x50 0x60 0x67 0x6A
|
|
0x6C 0x6A 0x6C 0x39 0x14 0x64 0x0E 0x04 0x2A 0x4E 0x81
|
|
0x8E 0x90 0x90 0x43 0x64 0x83 0x96 0xA5 0x80 0x86 0xAC
|
|
0xCB 0x2F 0x00 0x64 0xA5 0xB5 0x00 0xF8 0x31>;
|
|
monitor_sec = <5>;
|
|
virtual_power = <0>;
|
|
};
|
|
};
|
|
|
|
&i2s0_8ch {
|
|
status = "okay";
|
|
#sound-dai-cells = <0>;
|
|
rockchip,clk-trcm = <1>;
|
|
rockchip,i2s-rx-route = <0 1 2 3>;
|
|
pinctrl-0 = <&i2s0m0_sclk_tx
|
|
&i2s0m0_lrck_tx
|
|
&i2s0m0_sdo0
|
|
&i2s0m0_sdi0>;
|
|
};
|
|
|
|
&isp_reserved {
|
|
size = <0x03c00000>;
|
|
};
|
|
|
|
&npu {
|
|
npu-supply = <&vdd_npu>;
|
|
};
|
|
|
|
&pinctrl {
|
|
es8311 {
|
|
/omit-if-no-ref/
|
|
spk_ctl: spk-ctl {
|
|
rockchip,pins = <2 RK_PA4 0 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
sd {
|
|
/omit-if-no-ref/
|
|
vccsd_en: vccsd-en {
|
|
rockchip,pins = <0 RK_PA4 0 &pcfg_pull_none>;
|
|
};
|
|
/omit-if-no-ref/
|
|
sdmmc_clk: sdmmc-clk {
|
|
rockchip,pins =
|
|
/* sdmmc0_clk */
|
|
<1 RK_PB0 1 &pcfg_pull_up_drv_level_3>;
|
|
};
|
|
};
|
|
wireless-wlan {
|
|
/omit-if-no-ref/
|
|
wifi_wake_host: wifi-wake-host {
|
|
rockchip,pins = <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
|
|
pmuio0-supply = <&vcc_3v3>;
|
|
pmuio1-supply = <&vcc_3v3>;
|
|
vccio2-supply = <&vccio_sd>;
|
|
vccio3-supply = <&vcc_1v8>;
|
|
vccio4-supply = <&vcc_1v8>;
|
|
vccio5-supply = <&vcc_3v3>;
|
|
vccio6-supply = <&vcc_3v3>;
|
|
vccio7-supply = <&vcc_3v3>;
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm1m0_pins_pull_down>;
|
|
};
|
|
|
|
&pwm2 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm2m0_pins_pull_down>;
|
|
};
|
|
|
|
&pwm6 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm6m0_pins_pull_down>;
|
|
};
|
|
|
|
&rkisp_thunderboot {
|
|
reg = <0x08000000 (32 * 0x00100000)>;
|
|
};
|
|
|
|
&rkisp_vir0 {
|
|
ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
isp_in: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&csidphy0_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkisp_vir1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkispp_vir1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc {
|
|
venc-supply = <&vdd_vepu>;
|
|
};
|
|
|
|
&rkvenc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
&sdio {
|
|
max-frequency = <50000000>;
|
|
bus-width = <4>;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
rockchip,default-sample-phase = <90>;
|
|
supports-sdio;
|
|
supports-chip-alive;
|
|
logic-remove-card;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
card-detect-delay = <200>;
|
|
rockchip,default-sample-phase = <90>;
|
|
supports-sd;
|
|
sd-uhs-sdr12;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr104;
|
|
vqmmc-supply = <&vccio_sd>;
|
|
vmmc-supply = <&vcc_sd>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
vup-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
&uart5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart5m2_xfer>;
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi {
|
|
status = "okay";
|
|
|
|
rockchip,lane-rate = <480>;
|
|
panel@0 {
|
|
compatible = "ilitek,ili9881d", "simple-panel-dsi";
|
|
reg = <0>;
|
|
backlight = <&backlight>;
|
|
power-supply = <&vcc18_lcd_n>;
|
|
prepare-delay-ms = <1>;
|
|
reset-delay-ms = <1>;
|
|
init-delay-ms = <5>;
|
|
disable-delay-ms = <10>;
|
|
unprepare-delay-ms = <5>;
|
|
|
|
width-mm = <68>;
|
|
height-mm = <121>;
|
|
|
|
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
|
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
|
|
dsi,format = <MIPI_DSI_FMT_RGB888>;
|
|
dsi,lanes = <4>;
|
|
|
|
panel-init-sequence = [
|
|
39 00 04 ff 98 81 03
|
|
15 00 02 01 00
|
|
15 00 02 02 00
|
|
15 00 02 03 53
|
|
15 00 02 04 53
|
|
15 00 02 05 13
|
|
15 00 02 06 04
|
|
15 00 02 07 02
|
|
15 00 02 08 02
|
|
15 00 02 09 00
|
|
15 00 02 0a 00
|
|
15 00 02 0b 00
|
|
15 00 02 0c 00
|
|
15 00 02 0d 00
|
|
15 00 02 0e 00
|
|
15 00 02 0f 00
|
|
15 00 02 10 00
|
|
15 00 02 11 00
|
|
15 00 02 12 00
|
|
15 00 02 13 00
|
|
15 00 02 14 00
|
|
15 00 02 15 08
|
|
15 00 02 16 10
|
|
15 00 02 17 00
|
|
15 00 02 18 08
|
|
15 00 02 19 00
|
|
15 00 02 1a 00
|
|
15 00 02 1b 00
|
|
15 00 02 1c 00
|
|
15 00 02 1d 00
|
|
15 00 02 1e c0
|
|
15 00 02 1f 80
|
|
15 00 02 20 02
|
|
15 00 02 21 09
|
|
15 00 02 22 00
|
|
15 00 02 23 00
|
|
15 00 02 24 00
|
|
15 00 02 25 00
|
|
15 00 02 26 00
|
|
15 00 02 27 00
|
|
15 00 02 28 55
|
|
15 00 02 29 03
|
|
15 00 02 2a 00
|
|
15 00 02 2b 00
|
|
15 00 02 2c 00
|
|
15 00 02 2d 00
|
|
15 00 02 2e 00
|
|
15 00 02 2f 00
|
|
15 00 02 30 00
|
|
15 00 02 31 00
|
|
15 00 02 32 00
|
|
15 00 02 33 00
|
|
15 00 02 34 04
|
|
15 00 02 35 05
|
|
15 00 02 36 05
|
|
15 00 02 37 00
|
|
15 00 02 38 3c
|
|
15 00 02 39 35
|
|
15 00 02 3a 00
|
|
15 00 02 3b 40
|
|
15 00 02 3c 00
|
|
15 00 02 3d 00
|
|
15 00 02 3e 00
|
|
15 00 02 3f 00
|
|
15 00 02 40 00
|
|
15 00 02 41 88
|
|
15 00 02 42 00
|
|
15 00 02 43 00
|
|
15 00 02 44 1f
|
|
15 00 02 50 01
|
|
15 00 02 51 23
|
|
15 00 02 52 45
|
|
15 00 02 53 67
|
|
15 00 02 54 89
|
|
15 00 02 55 ab
|
|
15 00 02 56 01
|
|
15 00 02 57 23
|
|
15 00 02 58 45
|
|
15 00 02 59 67
|
|
15 00 02 5a 89
|
|
15 00 02 5b ab
|
|
15 00 02 5c cd
|
|
15 00 02 5d ef
|
|
15 00 02 5e 03
|
|
15 00 02 5f 14
|
|
15 00 02 60 15
|
|
15 00 02 61 0c
|
|
15 00 02 62 0d
|
|
15 00 02 63 0e
|
|
15 00 02 64 0f
|
|
15 00 02 65 10
|
|
15 00 02 66 11
|
|
15 00 02 67 08
|
|
15 00 02 68 02
|
|
15 00 02 69 0a
|
|
15 00 02 6a 02
|
|
15 00 02 6b 02
|
|
15 00 02 6c 02
|
|
15 00 02 6d 02
|
|
15 00 02 6e 02
|
|
15 00 02 6f 02
|
|
15 00 02 70 02
|
|
15 00 02 71 02
|
|
15 00 02 72 06
|
|
15 00 02 73 02
|
|
15 00 02 74 02
|
|
15 00 02 75 14
|
|
15 00 02 76 15
|
|
15 00 02 77 0f
|
|
15 00 02 78 0e
|
|
15 00 02 79 0d
|
|
15 00 02 7a 0c
|
|
15 00 02 7b 11
|
|
15 00 02 7c 10
|
|
15 00 02 7d 06
|
|
15 00 02 7e 02
|
|
15 00 02 7f 0a
|
|
15 00 02 80 02
|
|
15 00 02 81 02
|
|
15 00 02 82 02
|
|
15 00 02 83 02
|
|
15 00 02 84 02
|
|
15 00 02 85 02
|
|
15 00 02 86 02
|
|
15 00 02 87 02
|
|
15 00 02 88 08
|
|
15 00 02 89 02
|
|
15 00 02 8a 02
|
|
39 00 04 ff 98 81 04
|
|
15 00 02 00 80
|
|
15 00 02 70 00
|
|
15 00 02 71 00
|
|
15 00 02 66 fe
|
|
15 00 02 82 15
|
|
15 00 02 84 15
|
|
15 00 02 85 15
|
|
15 00 02 3a 24
|
|
15 00 02 32 ac
|
|
15 00 02 8c 80
|
|
15 00 02 3c f5
|
|
15 00 02 88 33
|
|
39 00 04 ff 98 81 01
|
|
15 00 02 22 0a
|
|
15 00 02 31 00
|
|
15 00 02 53 78
|
|
15 00 02 55 7b
|
|
15 00 02 60 20
|
|
15 00 02 61 00
|
|
15 00 02 62 0d
|
|
15 00 02 63 00
|
|
15 00 02 a0 00
|
|
15 00 02 a1 10
|
|
15 00 02 a2 1c
|
|
15 00 02 a3 13
|
|
15 00 02 a4 15
|
|
15 00 02 a5 26
|
|
15 00 02 a6 1a
|
|
15 00 02 a7 1d
|
|
15 00 02 a8 67
|
|
15 00 02 a9 1c
|
|
15 00 02 aa 29
|
|
15 00 02 ab 5b
|
|
15 00 02 ac 26
|
|
15 00 02 ad 28
|
|
15 00 02 ae 5c
|
|
15 00 02 af 30
|
|
15 00 02 b0 31
|
|
15 00 02 b1 32
|
|
15 00 02 b2 00
|
|
15 00 02 b1 2e
|
|
15 00 02 b2 32
|
|
15 00 02 b3 00
|
|
15 00 02 c0 00
|
|
15 00 02 c1 10
|
|
15 00 02 c2 1c
|
|
15 00 02 c3 13
|
|
15 00 02 c4 15
|
|
15 00 02 c5 26
|
|
15 00 02 c6 1a
|
|
15 00 02 c7 1d
|
|
15 00 02 c8 67
|
|
15 00 02 c9 1c
|
|
15 00 02 ca 29
|
|
15 00 02 cb 5b
|
|
15 00 02 cc 26
|
|
15 00 02 cd 28
|
|
15 00 02 ce 5c
|
|
15 00 02 cf 30
|
|
15 00 02 d0 31
|
|
15 00 02 d1 2e
|
|
15 00 02 d2 32
|
|
15 00 02 d3 00
|
|
39 00 04 ff 98 81 00
|
|
05 00 01 11
|
|
05 01 01 29
|
|
];
|
|
|
|
display-timings {
|
|
native-mode = <&timing0>;
|
|
|
|
timing0: timing0 {
|
|
clock-frequency = <65000000>;
|
|
hactive = <720>;
|
|
vactive = <1280>;
|
|
hfront-porch = <48>;
|
|
hsync-len = <8>;
|
|
hback-porch = <52>;
|
|
vfront-porch = <16>;
|
|
vsync-len = <6>;
|
|
vback-porch = <15>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
panel_in_dsi: endpoint {
|
|
remote-endpoint = <&dsi_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi_out_panel: endpoint {
|
|
remote-endpoint = <&panel_in_dsi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&mipi_dphy {
|
|
status = "okay";
|
|
};
|
|
|
|
&display_subsystem {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|