416 lines
8.8 KiB
C
Executable File
416 lines
8.8 KiB
C
Executable File
/******************************************************************************
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*
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* Copyright(c) 2007 - 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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/***** temporarily flag for IC development phase *******/
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#define CONFIG_SINGLE_IMG
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/*#define CONFIG_NO_FW*/
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/*#define CONFIG_DISABLE_ODM*/
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#define RTW_WKARD_CORE_RSSI_V1
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#ifdef RTW_WKARD_CORE_RSSI_V1
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#define CONFIG_RX_PSTS_PER_PKT
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#define CONFIG_SIGNAL_STAT_PROCESS
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#endif
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#ifndef DBG_MEM_ALLOC
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#define DBG_MEM_ALLOC
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#define DBG_PHL_MEM_ALLOC
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#define DBG_HAL_MAC_MEM_MOINTOR
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#define DBG_HAL_MEM_MOINTOR
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#endif
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/*#define CONFIG_PHL_USE_KMEM_ALLOC*/
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#define CONFIG_HW_RTS
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/*
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* Work around Config
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*/
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#define RTW_WKARD_DIS_PROBE_REQ_RPT_TO_HOSTAPD
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/***** temporarily flag *******/
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/*
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* Public General Config
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*/
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#define AUTOCONF_INCLUDED
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#define DRV_NAME "rtl8852be"
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#define CONFIG_PCI_HCI
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#define CONFIG_PCIE_TRX_MIT
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#ifdef CONFIG_PCIE_TRX_MIT
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#define PCIE_RX_INT_MIT_TIMER 4096
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/*#define CONFIG_PCIE_TRX_MIT_FIX*/ /* if defined, the mitigation mode will be set to fixed */
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#ifndef CONFIG_PCIE_TRX_MIT_FIX
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#define CONFIG_PCIE_TRX_MIT_DYN
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#endif
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#endif
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#define CONFIG_RPQ_AGG_NUM 30
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/*
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* Wi-Fi Functions Config
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*/
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/*#define CONFIG_RECV_REORDERING_CTRL*/
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#define CONFIG_80211N_HT
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#define CONFIG_80211AC_VHT
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#define CONFIG_80211AX_HE
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#ifdef CONFIG_80211AC_VHT
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#ifndef CONFIG_80211N_HT
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#define CONFIG_80211N_HT
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#endif
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#endif
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#ifdef CONFIG_80211AX_HE
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#ifndef CONFIG_80211N_HT
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#define CONFIG_80211N_HT
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#endif
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#ifndef CONFIG_80211AC_VHT
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#define CONFIG_80211AC_VHT
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#endif
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#endif
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#define CONFIG_BEAMFORMING
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#ifdef CONFIG_BEAMFORMING
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/*#define RTW_WKARD_TX_DISABLE_BFEE*/
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#endif
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/*#define CONFIG_IOCTL_CFG80211*/
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#ifdef CONFIG_IOCTL_CFG80211
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/*#define RTW_USE_CFG80211_STA_EVENT*/ /* Indecate new sta asoc through cfg80211_new_sta */
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#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
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/*#define CONFIG_DEBUG_CFG80211*/
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#define CONFIG_SET_SCAN_DENY_TIMER
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#endif
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#define CONFIG_TX_AMSDU
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#ifdef CONFIG_TX_AMSDU
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#ifdef CONFIG_PLATFORM_RTL8198D
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#define CONFIG_TX_AMSDU_HW_MODE 1
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#else
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#define CONFIG_TX_AMSDU_SW_MODE 1
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#endif
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#endif
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/*
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* Internal General Config
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*/
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/*#define CONFIG_PWRCTRL*/
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#define CONFIG_TRX_BD_ARCH /* PCI only */
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#define USING_RX_TAG
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#define CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_EMBEDDED_FWIMG
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#define LOAD_FW_HEADER_FROM_DRIVER
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#endif
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/*#define CONFIG_FILE_FWIMG*/
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/* #define CONFIG_XMIT_ACK */
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#ifdef CONFIG_XMIT_ACK
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#define CONFIG_ACTIVE_KEEP_ALIVE_CHECK
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#endif
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#define BUF_DESC_ARCH /* if defined, hardware follows Rx buffer descriptor architecture */
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#ifdef CONFIG_POWER_SAVING
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#define CONFIG_IPS
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#ifdef CONFIG_IPS
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#endif
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#define CONFIG_LPS
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#if defined(CONFIG_LPS)
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/*#define CONFIG_LPS_LCLK*/ /* 32K */
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#endif
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#ifdef CONFIG_LPS_LCLK
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#define CONFIG_XMIT_THREAD_MODE
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#define LPS_RPWM_WAIT_MS 300
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#endif
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#endif
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#ifdef CONFIG_POWER_SAVE
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/* #define CONFIG_RTW_IPS */
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/* #define CONFIG_RTW_LPS */
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#ifdef CONFIG_RTW_LPS
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#define CONFIG_RTW_LPS_RFOFF
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#endif
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#if defined(CONFIG_RTW_IPS) || defined(CONFIG_RTW_LPS)
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#define CONFIG_PS_FW_DBG
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#endif
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#endif
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/*#define CONFIG_ANTENNA_DIVERSITY*/
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/*#define CONFIG_PCI_ASPM*/
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#ifdef CONFIG_PCI_ASPM
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#define CONFIG_PCI_DYNAMIC_ASPM
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#endif
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#define CONFIG_AP_MODE
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#ifdef CONFIG_AP_MODE
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#define CONFIG_NATIVEAP_MLME
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#ifndef CONFIG_NATIVEAP_MLME
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#define CONFIG_HOSTAPD_MLME
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#endif
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/*#define CONFIG_FIND_BEST_CHANNEL*/
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/*#define CONFIG_AUTO_AP_MODE*/
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#endif
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#define CONFIG_P2P
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#ifdef CONFIG_P2P
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/* The CONFIG_WFD is for supporting the Wi-Fi display */
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#define CONFIG_WFD
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#define CONFIG_P2P_REMOVE_GROUP_INFO
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/*#define CONFIG_DBG_P2P*/
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#define CONFIG_P2P_PS
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/*#define CONFIG_P2P_IPS*/
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#define CONFIG_P2P_OP_CHK_SOCIAL_CH
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#define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT /* replace CONFIG_P2P_CHK_INVITE_CH_LIST flag */
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/*#define CONFIG_P2P_INVITE_IOT*/
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#endif
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/* Added by Kurt 20110511 */
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#ifdef CONFIG_TDLS
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#define CONFIG_TDLS_DRIVER_SETUP
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#if 0
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#ifndef CONFIG_WFD
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#define CONFIG_WFD
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#endif
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#define CONFIG_TDLS_AUTOSETUP
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#endif
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#define CONFIG_TDLS_AUTOCHECKALIVE
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/* #define CONFIG_TDLS_CH_SW */ /* Enable this flag only when we confirm that TDLS CH SW is supported in FW */
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#endif
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#define CONFIG_SKB_COPY /* for amsdu */
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/*#define CONFIG_RTW_LED*/
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#ifdef CONFIG_RTW_LED
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/*#define CONFIG_RTW_SW_LED*/
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#ifdef CONFIG_RTW_SW_LED
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/*#define CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD*/
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#endif
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#endif /* CONFIG_RTW_LED */
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#define CONFIG_GLOBAL_UI_PID
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/*#define CONFIG_ADAPTOR_INFO_CACHING_FILE*/ /* now just applied on 8192cu only, should make it general...*/
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/*#define CONFIG_RESUME_IN_WORKQUEUE*/
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/*#define CONFIG_SET_SCAN_DENY_TIMER*/
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#define CONFIG_LONG_DELAY_ISSUE
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/*#define CONFIG_SIGNAL_DISPLAY_DBM*/ /* display RX signal with dbm */
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#ifdef CONFIG_SIGNAL_DISPLAY_DBM
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/*#define CONFIG_BACKGROUND_NOISE_MONITOR*/
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#endif
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/*
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* Software feature Related Config
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*/
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#define CONFIG_SCAN_BACKOP_STA
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#define CONFIG_RTW_REDUCE_MEM
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/*
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* Interface Related Config
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*/
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/* #define CONFIG_RTW_FORCE_PCI_MSI_DISABLE */
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/*
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* HAL Related Config
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*/
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#define CONFIG_RX_PACKET_APPEND_FCS
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#define DISABLE_BB_RF 0
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#ifdef CONFIG_MP_INCLUDED
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#define MP_DRIVER 1
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#else
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#define MP_DRIVER 0
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#endif
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#ifndef EFUSE_MAP_PATH
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#define EFUSE_MAP_PATH "/system/etc/wifi/wifi_efuse.map"
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#endif
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#ifndef WIFIMAC_PATH
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#define WIFIMAC_PATH "/data/wifimac.txt"
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#endif
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/* Use cmd frame to issue beacon. Use a fixed buffer for beacon. */
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#define CONFIG_BCN_ICF
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#ifdef CONFIG_HWSIM
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/* Use pure sw beacon */
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#undef CONFIG_BCN_ICF
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#endif
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/* #define RTL8814BE_AMPDU_PRE_TX_OFF */
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/*
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* Platform Related Config
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*/
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/* #define CONFIG_TX_EARLY_MODE */
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/*
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* Debug Related Config
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*/
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#define DBG 1
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/*#define DBG_CONFIG_ERROR_DETECT*/
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/* #define DBG_CONFIG_ERROR_DETECT_INT */
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/* #define DBG_CONFIG_ERROR_RESET */
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/* #define DBG_IO */
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/* #define DBG_DELAY_OS */
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/* #define DBG_MEM_ALLOC */
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/* #define DBG_IOCTL */
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/* #define DBG_TX */
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/* #define DBG_XMIT_BUF */
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/* #define DBG_XMIT_BUF_EXT */
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/* #define DBG_TX_DROP_FRAME */
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/* #define DBG_RX_DROP_FRAME */
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/* #define DBG_RX_SEQ */
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/* #define DBG_RX_SIGNAL_DISPLAY_PROCESSING */
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/* #define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" */
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/* #define DBG_ROAMING_TEST */
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/* #define DBG_HAL_INIT_PROFILING */
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/*#define DBG_MEMORY_LEAK*/
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/* #define CONFIG_FW_C2H_DEBUG */
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#define CONFIG_DBG_COUNTER
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#define DBG_RX_DFRAME_RAW_DATA
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/*#define DBG_TXBD_DESC_DUMP*/
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#define CONFIG_RTW_EFUSE_DBG_DUMP 1
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#define CONFIG_PCI_BCN_POLLING
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//#define RTW_PHL_TEST_FPGA //For 8852A PCIE FPGA TEST
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/* #define CONFIG_DMA_USE_COHERENT_MEM */
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#ifdef CONFIG_DMA_USE_COHERENT_MEM
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/*#define CONFIG_DMA_TX_USE_COHERENT_MEM*/
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#define CONFIG_DMA_RX_USE_COHERENT_MEM
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#else
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#ifndef CONFIG_DIS_DYN_RXBUF
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#define CONFIG_DYNAMIC_RX_BUF
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#endif
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#endif
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/*#define CONFIG_RTW_BTM_ROAM*/
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/*#define CONFIG_RTW_80211R*/
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#ifdef CONFIG_RTW_MBO
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#ifndef CONFIG_RTW_WNM
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#define CONFIG_RTW_WNM
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#endif
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#ifndef CONFIG_RTW_80211K
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#define CONFIG_RTW_80211K
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#endif
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#endif /* CONFIG_RTW_MBO */
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/* Separate TRX path into different CPUs */
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/*#define CONFIG_PHL_CPU_BALANCE*/
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#ifdef CONFIG_PHL_CPU_BALANCE
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#define CONFIG_PHL_CPU_BALANCE_TX
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#define CPU_ID_TX_PHL_0 1
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/*#define CONFIG_PHL_CPU_BALANCE_RX*/
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#define CPU_ID_RX_CORE_0 2
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#endif
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#ifdef RTW_PHL_TEST_FPGA
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#ifndef RTW_PHL_TX
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#define RTW_PHL_TX
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#endif
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#ifndef RTW_PHL_RX
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#define RTW_PHL_RX
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#endif
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#ifndef DIRTY_FOR_WORK
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#define DIRTY_FOR_WORK
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#endif
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#ifndef CONFIG_DYNAMIC_RX_BUF
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#define CONFIG_DYNAMIC_RX_BUF
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#endif
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#ifndef RTW_PHL_DBG_CMD
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#define RTW_PHL_DBG_CMD
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#endif
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#ifndef CONFIG_DRV_FAKE_AP
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#error "Please enable CONFIG_DRV_FAKE_AP in Makefile before Beacon ready\n"
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#endif
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#ifndef RTW_PHL_FWDL
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#define RTW_PHL_FWDL
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#endif
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#ifdef CONFIG_RTW_NAPI
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#undef CONFIG_RTW_NAPI
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#endif
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#ifdef CONFIG_RTW_GRO
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#undef CONFIG_RTW_GRO
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#endif
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#ifdef CONFIG_RTW_NETIF_SG
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#undef CONFIG_RTW_NETIF_SG
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#endif
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#if 1
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#define DBGP(fmt, args...) printk("dbg [%s][%d]"fmt, __FUNCTION__, __LINE__, ## args)
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#else
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#define DBGP(arg...) do {} while (0)
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#endif
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#else //RTW_PHL_TEST_FPGA
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#define DBGP(arg...) do {} while (0)
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#endif
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/* Platform dependent config, shall put on the bottom of this file */
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#ifdef CONFIG_PLATFORM_RTL8198D
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#include "autoconf_mips_98d.h"
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#endif
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/* Platform dependent config, shall put on the bottom of this file */
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#ifdef CONFIG_I386_BUILD_VERIFY
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#include "autoconf_i386_ap_func.h"
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#endif
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#ifdef CONFIG_ARCH_CORTINA
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#include "autoconf_arm_9617b.h"
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#endif /* CONFIG_ARCH_CORTINA */
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