// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd

/dts-v1/;
#include "rk3288-evb-rk628.dtsi"

/ {
	model = "Rockchip RK3288 EVB RK628 Board";
	compatible = "rockchip,rk3288-evb-rk628", "rockchip,rk3288";

	panel {
		compatible = "simple-panel";
		backlight = <&backlight>;
		enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
		prepare-delay-ms = <20>;
		enable-delay-ms = <20>;
		disable-delay-ms = <20>;
		unprepare-delay-ms = <20>;
		bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;

		display-timings {
			native-mode = <&timing0>;

			timing0: timing0 {
				clock-frequency = <48000000>;
				hactive = <1024>;
				vactive = <600>;
				hback-porch = <90>;
				hfront-porch = <90>;
				vback-porch = <10>;
				vfront-porch = <10>;
				hsync-len = <90>;
				vsync-len = <10>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};

		port {
			panel_in_lvds: endpoint {
				remote-endpoint = <&lvds_out_panel>;
			};
		};
	};
};

&rk628_lvds {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			lvds_in_post_process: endpoint {
				remote-endpoint = <&post_process_out_lvds>;
			};
		};

		port@1 {
			reg = <1>;

			lvds_out_panel: endpoint {
				remote-endpoint = <&panel_in_lvds>;
			};
		};
	};
};

&rk628_combtxphy {
	status = "okay";
};

&rk628_post_process {
	pinctrl-names = "default";
	pinctrl-0 = <&rk628_vop_pins>;
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			post_process_in_rgb: endpoint {
				remote-endpoint = <&rgb_out_post_process>;
			};
		};

		port@1 {
			reg = <1>;

			post_process_out_lvds: endpoint {
				remote-endpoint = <&lvds_in_post_process>;
			};
		};
	};
};

&rgb {
	status = "okay";

	ports {
		port@1 {
			reg = <1>;

			rgb_out_post_process: endpoint {
				remote-endpoint = <&post_process_in_rgb>;
			};
		};
	};
};

&video_phy {
	status = "okay";
};

&rgb_in_vopb {
	status = "disabled";
};

&rgb_in_vopl {
	status = "okay";
};

&route_rgb {
	connect = <&vopl_out_rgb>;
	status = "disabled";
};

&vopb {
	assigned-clocks = <&cru DCLK_VOP0>;
	assigned-clock-parents = <&cru PLL_GPLL>;
};

&vopl {
	assigned-clocks = <&cru DCLK_VOP1>;
	assigned-clock-parents = <&cru PLL_CPLL>;
};