// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd /dts-v1/; #include "rk3288-evb-rk628.dtsi" / { model = "Rockchip RK3288 EVB RK628 Board"; compatible = "rockchip,rk3288-evb-rk628", "rockchip,rk3288"; chosen { bootargs = "rootwait earlycon=uart8250,mmio32,0xff690000 vmalloc=496M swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0"; }; vcc_lcd1: vcc-lcd1 { compatible = "regulator-fixed"; regulator-name = "vcc_lcd1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; gpio = <&gpio7 RK_PB0 GPIO_ACTIVE_HIGH>; enable-active-high; vin-supply = <&vcc_io>; }; panel { compatible = "simple-panel"; backlight = <&backlight>; power-supply = <&vcc_lcd1>; prepare-delay-ms = <20>; enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; enable-delay-ms = <200>; disable-delay-ms = <20>; unprepare-delay-ms = <20>; bus-format = ; width-mm = <136>; height-mm = <217>; status = "okay"; display-timings { native-mode = <&timing>; timing: timing { clock-frequency = <594000000>; hactive = <3840>; vactive = <2160>; hback-porch = <296>; hfront-porch = <176>; vback-porch = <72>; vfront-porch = <8>; hsync-len = <88>; vsync-len = <10>; hsync-active = <1>; vsync-active = <1>; de-active = <0>; pixelclk-active = <0>; }; }; port { panel_in_gvi: endpoint { remote-endpoint = <&gvi_out_panel>; }; }; }; }; &backlight { enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; }; &rk628 { pinctrl-names = "default"; pinctrl-0 = <&test_clkout>; assigned-clocks = <&cru SCLK_TESTOUT_SRC>; assigned-clock-parents = <&xin24m>; }; &rk628_combtxphy { status = "okay"; }; &hdmi { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; hdmi_out_hdmirx: endpoint { remote-endpoint = <&hdmirx_in_hdmi>; }; }; }; }; &rk628_gvi { pinctrl-names = "default"; pinctrl-0 = <&rk628_gvi_hpd_pins>, <&rk628_gvi_lock_pins>; status = "okay"; rockchip,lane-num = <8>; /* rockchip,division-mode; */ ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; gvi_in_post_process: endpoint { remote-endpoint = <&post_process_out_gvi>; }; }; port@1 { reg = <1>; gvi_out_panel: endpoint { remote-endpoint = <&panel_in_gvi>; }; }; }; }; &rk628_combtxphy { status = "okay"; }; &rk628_post_process { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; post_process_in_hdmirx: endpoint { remote-endpoint = <&hdmirx_out_post_process>; }; }; port@1 { reg = <1>; post_process_out_gvi: endpoint { remote-endpoint = <&gvi_in_post_process>; }; }; }; }; &rk628_combrxphy { status = "okay"; }; &rk628_hdmirx { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; hdmirx_in_hdmi: endpoint { remote-endpoint = <&hdmi_out_hdmirx>; }; }; port@1 { reg = <1>; hdmirx_out_post_process: endpoint { remote-endpoint = <&post_process_in_hdmirx>; }; }; }; }; &rk628_xin_osc0_func { compatible = "fixed-factor-clock"; clocks = <&cru SCLK_TESTOUT>; clock-mult = <1>; clock-div = <1>; }; &hdmi_in_vopl { status = "disabled"; }; &hdmi_in_vopb { status = "okay"; }; &route_hdmi { connect = <&vopb_out_rgb>; status = "disabled"; }; &pinctrl { test { test_clkout: test-clkout { rockchip,pins = <0 17 RK_FUNC_1 &pcfg_pull_none>; }; }; };