// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2022 Rockchip Electronics Co., Ltd. */ /dts-v1/; #include "rv1126.dtsi" #include "rv1126-ipc.dtsi" / { model = "Rockchip RV1109 38 RK630 Board"; compatible = "rockchip,rv1109-38-rk630", "rockchip,rv1109"; chosen { bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 ubi.mtd=3 ubi.block=0,rootfs root=/dev/ubiblock0_0 rootfstype=squashfs snd_aloop.index=7"; }; /delete-node/ vdd-npu; /delete-node/ vdd-vepu; cam_ircut0: cam_ircut { compatible = "rockchip,ircut"; status = "okay"; ircut-open-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; ircut-close-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&ircut_pins>; rockchip,camera-module-index = <1>; rockchip,camera-module-facing = "front"; }; rk630_sound: rk630-sound { status = "okay"; compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,name = "rockchip,rk630-codec"; simple-audio-card,mclk-fs = <256>; simple-audio-card,cpu { sound-dai = <&i2s0_8ch>; }; simple-audio-card,codec { sound-dai = <&rk630_codec>; }; }; vcc_1v8: vcc-1v8 { compatible = "regulator-fixed"; regulator-name = "vcc_1v8"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vcc_dvdd: vcc-dvdd { compatible = "regulator-fixed"; regulator-name = "vcc_dvdd"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; vcc3v3_sys: vcc33sys { compatible = "regulator-fixed"; regulator-name = "vcc3v3_sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; vcc_sd: vcc-sd { compatible = "regulator-fixed"; gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&sdmmc_pwr>; pinctrl-names = "default"; regulator-name = "vcc_sd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; startup-delay-us = <100000>; vin-supply = <&vcc3v3_sys>; enable-active-high; }; vdd_arm: vdd-arm { compatible = "pwm-regulator"; pwms = <&pwm0 0 5000 1>; regulator-name = "vdd_arm"; regulator-min-microvolt = <720000>; regulator-max-microvolt = <1000000>; regulator-init-microvolt = <825000>; regulator-always-on; regulator-boot-on; regulator-settling-time-up-us = <250>; pwm-supply = <&vcc3v3_sys>; status = "okay"; }; /* * pwm1 is reserved as voltage adjustment in hardware * use fixed regulator to avoid voltage adjustment by software */ vdd_logic_npu_vepu: vdd-logic-npu-vepu { compatible = "pwm-regulator"; pwms = <&pwm1 0 5000 1>; regulator-name = "vdd_logic_npu_vepu"; regulator-min-microvolt = <720000>; regulator-max-microvolt = <880000>; regulator-init-microvolt = <825000>; regulator-always-on; regulator-boot-on; regulator-settling-time-up-us = <250>; pwm-supply = <&vcc3v3_sys>; status = "okay"; }; vdd_logic_npu_vepu_fixed: vdd-logic-npu-vepu-fixed { compatible = "regulator-fixed"; regulator-name = "vdd_logic_npu_vepu-fixed"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <825000>; regulator-max-microvolt = <825000>; }; wireless_wlan: wireless-wlan { compatible = "wlan-platdata"; rockchip,grf = <&grf>; wifi_chip_type = "rtl8188fu"; WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; status = "okay"; }; }; &csi_dphy0 { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipi_in_ucam0: endpoint@1 { reg = <1>; remote-endpoint = <&ucam_out0>; data-lanes = <1 2 3 4>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; csidphy0_out: endpoint@0 { reg = <0>; remote-endpoint = <&isp_in>; }; }; }; }; &gmac { phy-mode = "rmii"; clock_in_out = "output"; assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>; assigned-clock-parents = <&cru CLK_GMAC_SRC_M0>, <&cru RMII_MODE_CLK>; assigned-clock-rates = <50000000>; pinctrl-names = "default"; pinctrl-0 = <&rmiim0_miim &rgmiim0_rxer &rmiim0_bus2 &rgmiim0_mclkinout_level0>; phy-handle = <&phy>; status = "okay"; }; &i2c1 { status = "okay"; clock-frequency = <400000>; os04a10: os04a10@36 { compatible = "ovti,os04a10"; reg = <0x36>; clocks = <&cru CLK_MIPICSI_OUT>; clock-names = "xvclk"; power-domains = <&power RV1126_PD_VI>; pinctrl-names = "rockchip,camera_default"; pinctrl-0 = <&mipicsi_clk0>; avdd-supply = <&vcc3v3_sys>; dovdd-supply = <&vcc_1v8>; dvdd-supply = <&vcc_dvdd>; pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; rockchip,camera-module-index = <1>; rockchip,camera-module-facing = "front"; rockchip,camera-module-name = "CMK-OT1607-FV1"; rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16"; ir-cut = <&cam_ircut0>; port { ucam_out0: endpoint { remote-endpoint = <&mipi_in_ucam0>; data-lanes = <1 2 3 4>; }; }; }; }; &i2c4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c4m1_xfer>; rk630: rk630@50 { reg = <0x50>; interrupt-parent = <&gpio0>; interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; reset-gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_LOW>; clocks = <&cru CLK_GMAC_ETHERNET_OUT>; clock-names = "ref"; assigned-clocks = <&cru CLK_GMAC_ETHERNET_OUT>; assigned-clock-rates = <25000000>; pinctrl-names = "default"; pinctrl-0 = <&clkm0_out_ethernet>; status = "okay"; }; }; #include "arm64/rockchip/rk630.dtsi" &i2s0_8ch { status = "okay"; rockchip,clk-trcm = <1>; #sound-dai-cells = <0>; pinctrl-0 = <&i2s0m0_sclk_tx &i2s0m0_lrck_tx &i2s0m0_sdi0 &i2s0m0_sdo0>; }; &mdio { phy: phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x0>; }; }; &nandc { status = "okay"; }; &npu { npu-supply = <&vdd_logic_npu_vepu_fixed>; }; &pinctrl { ircut { /omit-if-no-ref/ ircut_pins: ircut-pins { rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; }; }; sdmmc-pwr { /omit-if-no-ref/ sdmmc_pwr: sdmmc-pwr { rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &pmu_io_domains { status = "okay"; pmuio0-supply = <&vcc3v3_sys>; pmuio1-supply = <&vcc3v3_sys>; vccio2-supply = <&vcc3v3_sys>; vccio4-supply = <&vcc_1v8>; vccio5-supply = <&vcc3v3_sys>; vccio6-supply = <&vcc3v3_sys>; vccio7-supply = <&vcc3v3_sys>; }; &rk630_codec { status = "okay"; #sound-dai-cells = <0>; compatible = "rockchip,rk630-codec"; clocks = <&cru MCLK_I2S0_TX_OUT2IO>; clock-names = "mclk"; pinctrl-names = "default"; pinctrl-0 = <&i2s0m0_mclk>; assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>; assigned-clock-parents = <&cru MCLK_I2S0_TX>; capture_volume = <12>; hp_volume = <26>; spk_volume = <26>; gpio_debug; }; &rk630_macphy { status = "okay"; }; &rkisp_vir0 { status = "okay"; ports { port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; isp_in: endpoint@0 { reg = <0>; remote-endpoint = <&csidphy0_out>; }; }; }; }; &rkvenc { venc-supply = <&vdd_logic_npu_vepu_fixed>; }; &rockchip_suspend { status = "okay"; rockchip,sleep-debug-en = <1>; rockchip,sleep-mode-config = < (0 | RKPM_SLP_ARMOFF | RKPM_SLP_PMU_PMUALIVE_32K | RKPM_SLP_PMU_DIS_OSC ) >; }; &sdmmc0_bus4 { rockchip,pins = /* sdmmc0_d0 */ <1 RK_PA4 1 &pcfg_pull_up_drv_level_0>, /* sdmmc0_d1 */ <1 RK_PA5 1 &pcfg_pull_up_drv_level_0>, /* sdmmc0_d2 */ <1 RK_PA6 1 &pcfg_pull_up_drv_level_0>, /* sdmmc0_d3 */ <1 RK_PA7 1 &pcfg_pull_up_drv_level_0>; }; &sdmmc0_clk { rockchip,pins = /* sdmmc0_clk */ <1 RK_PB0 1 &pcfg_pull_up_drv_level_3>; }; &sdmmc0_cmd { rockchip,pins = /* sdmmc0_cmd */ <1 RK_PB1 1 &pcfg_pull_up_drv_level_0>; }; &sdmmc { bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; card-detect-delay = <200>; rockchip,default-sample-phase = <90>; supports-sd; status = "okay"; vmmc-supply = <&vcc_sd>; }; &sfc { status = "okay"; }; &u2phy_host { status = "okay"; }; &u2phy1 { status = "okay"; }; &usb_host0_ehci { status = "okay"; }; &usb_host0_ohci { status = "okay"; };