// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd

/dts-v1/;
#include "rk3288-evb-rk628.dtsi"

&rk628_dsi0 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			dsi0_in_post_process: endpoint {
				remote-endpoint = <&post_process_out_dsi0>;
			};
		};
	};

	panel@0 {
		compatible = "simple-panel-dsi";
		reg = <0>;
		backlight = <&backlight>;
		enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
		prepare-delay-ms = <120>;
		enable-delay-ms = <120>;
		disable-delay-ms = <120>;
		unprepare-delay-ms = <120>;
		init-delay-ms = <120>;

		dsi,flags = <(MIPI_DSI_MODE_VIDEO |
			      MIPI_DSI_MODE_VIDEO_BURST |
			      MIPI_DSI_MODE_LPM |
			      MIPI_DSI_MODE_EOT_PACKET)>;
		dsi,format = <MIPI_DSI_FMT_RGB888>;
		dsi,lanes = <4>;

		panel-init-sequence = [
			39 00 04 ff 98 81 03
			39 00 02 01 00
			39 00 02 02 00
			39 00 02 03 53
			39 00 02 04 53
			39 00 02 05 13
			39 00 02 06 04
			39 00 02 07 02
			39 00 02 08 02
			39 00 02 09 00
			39 00 02 0a 00
			39 00 02 0b 00
			39 00 02 0c 00
			39 00 02 0d 00
			39 00 02 0e 00
			39 00 02 0f 00
			39 00 02 10 00
			39 00 02 11 00
			39 00 02 12 00
			39 00 02 13 00
			39 00 02 14 00
			39 00 02 15 08
			39 00 02 16 10
			39 00 02 17 00
			39 00 02 18 08
			39 00 02 19 00
			39 00 02 1a 00
			39 00 02 1b 00
			39 00 02 1c 00
			39 00 02 1d 00
			39 00 02 1e c0
			39 00 02 1f 80
			39 00 02 20 02
			39 00 02 21 09
			39 00 02 22 00
			39 00 02 23 00
			39 00 02 24 00
			39 00 02 25 00
			39 00 02 26 00
			39 00 02 27 00
			39 00 02 28 55
			39 00 02 29 03
			39 00 02 2a 00
			39 00 02 2b 00
			39 00 02 2c 00
			39 00 02 2d 00
			39 00 02 2e 00
			39 00 02 2f 00
			39 00 02 30 00
			39 00 02 31 00
			39 00 02 32 00
			39 00 02 33 00
			39 00 02 34 04
			39 00 02 35 05
			39 00 02 36 05
			39 00 02 37 00
			39 00 02 38 3c
			39 00 02 39 35
			39 00 02 3a 00
			39 00 02 3b 40
			39 00 02 3c 00
			39 00 02 3d 00
			39 00 02 3e 00
			39 00 02 3f 00
			39 00 02 40 00
			39 00 02 41 88
			39 00 02 42 00
			39 00 02 43 00
			39 00 02 44 1f
			39 00 02 50 01
			39 00 02 51 23
			39 00 02 52 45
			39 00 02 53 67
			39 00 02 54 89
			39 00 02 55 ab
			39 00 02 56 01
			39 00 02 57 23
			39 00 02 58 45
			39 00 02 59 67
			39 00 02 5a 89
			39 00 02 5b ab
			39 00 02 5c cd
			39 00 02 5d ef
			39 00 02 5e 03
			39 00 02 5f 14
			39 00 02 60 15
			39 00 02 61 0c
			39 00 02 62 0d
			39 00 02 63 0e
			39 00 02 64 0f
			39 00 02 65 10
			39 00 02 66 11
			39 00 02 67 08
			39 00 02 68 02
			39 00 02 69 0a
			39 00 02 6a 02
			39 00 02 6b 02
			39 00 02 6c 02
			39 00 02 6d 02
			39 00 02 6e 02
			39 00 02 6f 02
			39 00 02 70 02
			39 00 02 71 02
			39 00 02 72 06
			39 00 02 73 02
			39 00 02 74 02
			39 00 02 75 14
			39 00 02 76 15
			39 00 02 77 0f
			39 00 02 78 0e
			39 00 02 79 0d
			39 00 02 7a 0c
			39 00 02 7b 11
			39 00 02 7c 10
			39 00 02 7d 06
			39 00 02 7e 02
			39 00 02 7f 0a
			39 00 02 80 02
			39 00 02 81 02
			39 00 02 82 02
			39 00 02 83 02
			39 00 02 84 02
			39 00 02 85 02
			39 00 02 86 02
			39 00 02 87 02
			39 00 02 88 08
			39 00 02 89 02
			39 00 02 8a 02
			39 00 04 ff 98 81 04
			39 00 02 00 80
			39 00 02 70 00
			39 00 02 71 00
			39 00 02 66 fe
			39 00 02 82 15
			39 00 02 84 15
			39 00 02 85 15
			39 00 02 3a 24
			39 00 02 32 ac
			39 00 02 8c 80
			39 00 02 3c f5
			39 00 02 88 33
			39 00 04 ff 98 81 01
			39 00 02 22 0a
			39 00 02 31 00
			39 00 02 53 78
			39 00 02 55 7b
			39 00 02 60 20
			39 00 02 61 00
			39 00 02 62 0d
			39 00 02 63 00
			39 00 02 a0 00
			39 00 02 a1 10
			39 00 02 a2 1c
			39 00 02 a3 13
			39 00 02 a4 15
			39 00 02 a5 26
			39 00 02 a6 1a
			39 00 02 a7 1d
			39 00 02 a8 67
			39 00 02 a9 1c
			39 00 02 aa 29
			39 00 02 ab 58
			39 00 02 ac 26
			39 00 02 ad 28
			39 00 02 ae 5c
			39 00 02 af 30
			39 00 02 b0 31
			39 00 02 b1 32
			39 00 02 b2 00
			39 00 02 c0 00
			39 00 02 c1 10
			39 00 02 c2 1c
			39 00 02 c3 13
			39 00 02 c4 15
			39 00 02 c5 26
			39 00 02 c6 1a
			39 00 02 c7 1d
			39 00 02 c8 67
			39 00 02 c9 1c
			39 00 02 ca 29
			39 00 02 cb 5b
			39 00 02 cc 26
			39 00 02 cd 28
			39 00 02 ce 5c
			39 00 02 cf 30
			39 00 02 d0 31
			39 00 02 d1 2e
			39 00 02 d2 32
			39 00 02 d3 00
			39 00 04 ff 98 81 00
			05 fa 01 11
			05 14 01 29
		];

		panel-exit-sequence = [
			05 00 01 28
			05 00 01 10
		];

		display-timings {
			native-mode = <&timing0>;

			timing0: timing0 {
				clock-frequency = <64000000>;
				hactive = <720>;
				vactive = <1280>;
				hfront-porch = <40>;
				hsync-len = <10>;
				hback-porch = <40>;
				vfront-porch = <22>;
				vsync-len = <4>;
				vback-porch = <11>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};
	};
};

&rk628_combtxphy {
	status = "okay";
};

&rk628_post_process {
	pinctrl-names = "default";
	pinctrl-0 = <&rk628_vop_pins>;
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			post_process_in_rgb: endpoint {
				remote-endpoint = <&rgb_out_post_process>;
			};
		};

		port@1 {
			reg = <1>;

			post_process_out_dsi0: endpoint {
				remote-endpoint = <&dsi0_in_post_process>;
			};
		};
	};
};

&rgb {
	status = "okay";

	ports {
		port@1 {
			reg = <1>;

			rgb_out_post_process: endpoint {
				remote-endpoint = <&post_process_in_rgb>;
			};
		};
	};
};

&video_phy {
	status = "okay";
};

&rgb_in_vopb {
	status = "disabled";
};

&rgb_in_vopl {
	status = "okay";
};

&route_rgb {
	connect = <&vopl_out_rgb>;
	status = "disabled";
};

&vopb {
	assigned-clocks = <&cru DCLK_VOP0>;
	assigned-clock-parents = <&cru PLL_GPLL>;
};

&vopl {
	assigned-clocks = <&cru DCLK_VOP1>;
	assigned-clock-parents = <&cru PLL_CPLL>;
};